Talk:Memory type range register

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Untitled edit

Latest comment: 14 years ago1 comment1 person in discussion

Does anyone know what the difference between Discrete and Continuous MTRR settings are? —Preceding unsigned comment added by 80.177.17.49 (talk) 14:55, 23 January 2010 (UTC)Reply

Historical Inaccuracy edit

Latest comment: 3 years ago1 comment1 person in discussion

This statement is historically inaccurate:

"When the CPU cache was moved inside the CPU, the CPUs implemented fixed-range MTRRs ... "

Caches were moved inside the CPU in the i486, but the MTRRs were only created (by me) for P6 / Pentium Pro, quite a few years later.

The MTRRs allowed P6 to do speculative cache misses to ordinary WB and WT memory, without worrying about MMIO side effects.

Prior to the MTRRs, speculative cache misses were not allowed because of the possibility of side effects.

This is just a minor bug report, to record this minor inaccuracy. If time permits I will correct, but I don't have time to do so at this moment. I welcome anyone else making this change (suitably footnoted). — Preceding unsigned comment added by A.Glew (talk • contribs) 00:54, 9 July 2020 (UTC)Reply

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