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Nanocircuitry

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Nanocircuits are electrical circuits operating on the nanometer scale. This is well into the quantum realm, where quantum mechanical effects become very important. One nanometer is equal to 10−9 meters or a row of 10 hydrogen atoms. With such progressively smaller circuits, more can be fitted on a computer chip. This allows faster and more complex functions using less power. Nanocircuits are composed of three different fundamental components. These are transistors, interconnections, and architecture, all fabricated on the nanometer scale.

Various approaches to nanocircuitry edit

A variety of proposals have been made to implement nanocircuitry in different forms. These include Nanowires, Single-Electron Transistors, Quantum dot cellular automata, and Nanoscale Crossbar Latches. However, likely nearer-term approaches will involve incorporation of nanomaterials to improve MOSFETs (metal–oxide–semiconductor field-effect transistors). These currently form the basis of most analog and digital circuit designs, the scaling of which drives Moore's Law. A review article[1] covering the MOSFET design and its future was published in 2004 comparing different geometries of MOSFETs under scale reduction and noted that circular cross-section vertical channel FETs are optimal for scale reduction. This configuration is capable of being implemented with a high density using vertical semiconductor cylindrical channels with nanoscale diameters and Infineon Technologies and Samsung have begun research and development in this direction resulting in some basic patents[2][3] using nanowires and carbon nanotubes in MOSFET designs. In an alternative approach,[4] Nanosys uses solution based deposition and alignment processes to pattern pre-fabricated arrays of nanowires on a substrate to serve as a lateral channel of an FET. While not capable of the same scalability as single nanowire FETs, the use of pre-fabricated multiple nanowires for the channel increases reliability and reduces production costs since large volume printing processes may be used to deposit the nanowires at a lower temperature than conventional fabrication procedures. In addition, due to the lower temperature deposition a wider variety of materials such as polymers may be used as the carrier substrate for the transistors opening the door to flexible electronic applications such as electronic paper, bendable flat panel displays, and wide area solar cells.

Production methods edit

One of the most fundamental concepts to understanding nanocircuits is the formulation of Moore’s Law. This concept arose when Intel co-founder Gordon Moore became interested in the cost of transistors and trying to fit more onto one chip. It relates that the number of transistors that can be fabricated on a silicon integrated circuit—and therefore the computing abilities of such a circuit—is doubling every 18 to 24 months.[5] The more transistors one can fit on a circuit, the more computational abilities the computer will have. This is why scientists and engineers are working together to produce these nanocircuits so increasingly more and more transistors will be able to fit onto a chip. Despite how good this may sound, there are many problems that arise when so many transistors are packed together. With circuits being so tiny, they tend to have more problems than larger circuits, more particularly heat - the amount of power applied over a smaller surface area makes heat dissipation difficult, this excess heat will cause errors and can destroy the chip. Nanoscale circuits are more sensitive to temperature changes, cosmic rays and electromagnetic interference than today's circuits.[6] As more transistors are packed onto a chip, phenomena such as stray signals on the chip, the need to dissipate the heat from so many closely packed devices, tunneling across insulation barriers due to the small scale, and fabrication difficulties will halt or severely slow progress.[7] There will be a time when the cost of making circuits even smaller will be too much, and the speed of computers will reach a maximum. For this reason, many scientists believe that Moore’s Law will not hold forever and will soon reach a peak, since Moore's law is largely predicated on computational gains caused by improvements in micro-lithographic etching technologies.

In producing these nanocircuits, there are many aspects involved. The first part of their organization begins with transistors. As of right now, most electronics are using silicon-based transistors. Transistors are an integral part of circuits as they control the flow of electricity and transform weak electrical signals to strong ones. They also control electric current as they can turn it on off, or even amplify signals. Circuits now use silicon as a transistor because it can easily be switched between conducting and nonconducting states. However, in nanoelectronics, transistors might be organic molecules or nanoscale inorganic structures.[8]Semiconductors, which are part of transistors, are also being made of organic molecules in the nano state.

The second aspect of nanocircuit organization is interconnection. This involves logical and mathematical operations and the wires linking the transistors together that make this possible. In nanocircuits, nanotubes and other wires as narrow as one nanometer are used to link transistors together. Nanowires have been made from carbon nanotubes for a few years. Until a few years ago, transistors and nanowires were put together to produce the circuit. However, scientists have been able to produce a nanowire with transistors in it. In 2004, Harvard University nanotech pioneer Charles Lieber and his team have made a nanowire—10,000 times thinner than a sheet of paper—that contains a string of transistors.[9] Essentially, transistors and nanowires are already pre-wired so as to eliminate the difficult task of trying to connect transistors together with nanowires.

The last part of nanocircuit organization is architecture. This has been explained as the overall way the transistors are interconnected, so that the circuit can plug into a computer or other system and operate independently of the lower-level details.[10] With nanocircuits being so small, they are destined for error and defects. Scientists have devised a way to get around this. Their architecture combines circuits that have redundant logic gates and interconnections with the ability to reconfigure structures at several levels on a chip.[11] The redundancy lets the circuit identify problems and reconfigure itself so the circuit can avoid more problems. It also allows for errors within the logic gate and still have it work properly without giving a wrong result.

Experimental breakthroughs and potential applications edit

Further information: Nanoelectronics and History of nanotechnology

In 1987, an IBM research team led by Bijan Davari demonstrated a metal–oxide–semiconductor field-effect transistor (MOSFET) with a 10 nm gate oxide thickness, using tungsten-gate technology.[12] Multi-gate MOSFETs enabled scaling below 20 nm gate length, starting with the FinFET (fin field-effect transistor), a three-dimensional, non-planar, double-gate MOSFET.[13] The FinFET originates from the research of Digh Hisamoto at Hitachi Central Research Laboratory in 1989.[14][15][16][17] At UC Berkeley, FinFET devices were fabricated by a group consisting of Hisamoto along with TSMC's Chenming Hu and other international researchers including Tsu-Jae King Liu, Jeffrey Bokor, Hideki Takeuchi, K. Asano, Jakub Kedziersk, Xuejue Huang, Leland Chang, Nick Lindert, Shibly Ahmed and Cyrus Tabery. The team fabricated FinFET devices down to a 17 nm process in 1998, and then 15 nm in 2001. In 2002, a team including Yu, Chang, Ahmed, Hu, Liu, Bokor and Tabery fabricated a 10 nm FinFET device.[13]

In 2005, Indian physicists Prabhakar Bandaru and Apparao M. Rao at UC San Diego developed the world's smallest transistor based to be made entirely from carbon nanotubes. It was intended to be used for nanocircuits. Nanotubes are rolled up sheets of carbon atoms and are more than a thousand times thinner than human hair.[18] In 2006, a team of Korean researchers from the Korea Advanced Institute of Science and Technology (KAIST) and the National Nano Fab Center developed a 3 nm MOSFET, the world's smallest nanoelectronic device, based on gate-all-around (GAA) FinFET technology.[19][20]

Normally, circuits use silicon-based transistors, but carbon nanotubes are intended to replace those. The transistor has two different branches that meet at a single point, hence giving it a Y shape. Current can flow throughout both branches and is controlled by a third branch that turns the voltage on or off. This new breakthrough can now allow for nanocircuits to hold completely to their name as they can be made entirely from nanotubes. Before this discovery, logic circuits used nanotubes, but needed metal gates to be able to control the flow of electric current.

Arguably the biggest potential application of nanocircuits deals with computers and electronics. Scientists and engineers are always looking to make computers faster. Some think in the nearer term, we could see hybrids of micro- and nano-: silicon with a nano core—perhaps a high-density computer memory that retains its contents forever.[21] Unlike conventional circuit design, which proceeds from blueprint to photographic pattern to chip, nanocircuit design will probably begin with the chip—a haphazard jumble of as many as 1024 components and wires, not all of which will even work—and gradually sculpt it into a useful device.[22] Instead of taking the traditional top-down approach, the bottom-up approach will probably soon have to be adopted because of the sheer size of these nanocircuits. Not everything in the circuit will probably work because at the nano level, nanocircuits will be more defective and faulty because of their compactness. Scientists and engineers have created all of the essential components of nanocircuits such as transistors, logic gates and diodes. They have all been constructed from organic molecules, carbon nanotubes and nanowire semiconductors. The only thing left to do is find a way to eliminate the errors that come with such a small device and nanocircuits will become a way of all electronics. However, eventually there will be a limit as to how small nanocircuits can become and computers and electronics will reach their equilibrium speeds.

See also edit

References edit

  1. ^ Colinge, J., Multiple-gate SOI MOSFETs, Solid-State Electronics 48, 2004
  2. ^ U.S. patent 6,740,910
  3. ^ U.S. patent 6,566,704
  4. ^ U.S. patent 7,135,728
  5. ^ Stokes, Jon. ”Understanding Moore's Law","ars technica", 2003-02-20. Retrieved on March 23, 2007.
  6. ^ Patch, Kimberly. “Design handles iffy nanocircuits","TRN",2003-03-26. Retrieved on March 23, 2007.
  7. ^ Patch, retrieved on March 23, 2007.
  8. ^ Eds. Scientific American, Understanding Nanotechnology (New York: Warner Books, 2002) p.93.
  9. ^ Pescovitz, David.“Nanowires with built-in transistors Archived 2007-08-03 at the Wayback Machine","boing boing", 2004-07-01. Retrieved on March 23, 2007.
  10. ^ Eds. Scientific American, 93.
  11. ^ Patch, retrieved on March 23, 2007.
  12. ^ Davari, Bijan; Ting, Chung-Yu; Ahn, Kie Y.; Basavaiah, S.; Hu, Chao-Kun; Taur, Yuan; Wordeman, Matthew R.; Aboelfotoh, O.; Krusin-Elbaum, L.; Joshi, Rajiv V.; Polcari, Michael R. (1987). "Submicron Tungsten Gate MOSFET with 10 nm Gate Oxide". 1987 Symposium on VLSI Technology. Digest of Technical Papers: 61–62.
  13. ^ a b Tsu‐Jae King, Liu (June 11, 2012). "FinFET: History, Fundamentals and Future". University of California, Berkeley. Symposium on VLSI Technology Short Course. Retrieved 9 July 2019.
  14. ^ Colinge, J.P. (2008). FinFETs and Other Multi-Gate Transistors. Springer Science & Business Media. p. 11. ISBN 9780387717517.
  15. ^ Hisamoto, D.; Kaga, T.; Kawamoto, Y.; Takeda, E. (December 1989). "A fully depleted lean-channel transistor (DELTA)-a novel vertical ultra thin SOI MOSFET". International Technical Digest on Electron Devices Meeting. pp. 833–836. doi:10.1109/IEDM.1989.74182. S2CID 114072236.
  16. ^ "IEEE Andrew S. Grove Award Recipients". IEEE Andrew S. Grove Award. Institute of Electrical and Electronics Engineers. Retrieved 4 July 2019.
  17. ^ "The Breakthrough Advantage for FPGAs with Tri-Gate Technology" (PDF). Intel. 2014. Retrieved 4 July 2019.
  18. ^ “Indians make the world’s tiniest transistor","SiliconIndia", 2005-09-06. Retrieved on March 23, 2007.
  19. ^ "Still Room at the Bottom (nanometer transistor developed by Yang-kyu Choi from the Korea Advanced Institute of Science and Technology)", Nanoparticle News, 1 April 2006, archived from the original on 6 November 2012, retrieved 24 September 2019
  20. ^ Lee, Hyunjin; et al. (2006). "Sub-5nm All-Around Gate FinFET for Ultimate Scaling". 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers. pp. 58–59. doi:10.1109/VLSIT.2006.1705215. hdl:10203/698. ISBN 978-1-4244-0005-8. S2CID 26482358.
  21. ^ Eds. Scientific American, 93.
  22. ^ Eds. Scientific American, 94.
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