List of integrated circuit packaging types
Integrated circuits are put into protective packages to allow easy handling and assembly onto printed circuit boards and to protect the devices from damage. A very large number of different types of package exist. Some package types have standardized dimensions and tolerances, and are registered with trade industry associations such as JEDEC and Pro Electron. Other types are proprietary designations that may be made by only one or two manufacturers. Integrated circuit packaging is the last assembly process before testing and shipping devices to customers.
Occasionally specially-processed integrated circuit dies are prepared for direct connections to a substrate without an intermediate header or carrier. In flip chip systems the IC is connected by solder bumps to a substrate. In beam-lead technology, the metallized pads that would be used for wire bonding connections in a conventional chip are thickened and extended to allow external connections to the circuit. Assemblies using "bare" chips have additional packaging or filling with epoxy to protect the devices from moisture.
- 1 Through-hole packages
- 2 Surface mount
- 3 Chip carrier
- 4 Pin grid arrays
- 5 Flat packages
- 6 Small outline packages
- 7 Chip-scale packages
- 8 Ball grid array
- 9 Transistor, diode, small-pin-count IC packages
- 10 Dimension reference
- 11 Package dimensions
- 12 Multi-chip packages
- 13 See also
- 14 References
- 15 External links
Through-hole technology uses holes drilled through the PCB for mounting the components. The component has leads that are soldered to pads on the PCB to electrically and mechanically connect them to the PCB.
|SIP||Single in-line package|
|DIP||Dual in-line package||0.1 in (2.54 mm) pin spacing, rows 0.3 in (7.62 mm) or 0.6 in (15.24 mm) apart.|
|CERDIP||Glass-sealed ceramic DIP|
|QIP||Quadruple in-line package||Like DIP but with staggered (zig-zag) pins.|
|SKDIP||Skinny DIP||Standard DIP with 0.1 in (2.54 mm) pin spacing, rows 0.3 in (7.62 mm) apart.|
|SDIP||Shrink DIP||Non-standard DIP with smaller 0.07 in (1.78 mm) pin spacing.|
|ZIP||Zig-zag in-line package|
|CCGA||Ceramic column-grid array (CGA)|
|LLP||Lead-less lead-frame package||A package with metric pin distribution (0.5–0.8 mm pitch)|
|LGA||Land grid array|
|LTCC||Low-temperature co-fired ceramic|
|MICRO SMDXT||Micro surface-mount device extended technology||Example|
A chip carrier is a rectangular package with contacts on all four edges. Leaded chip carriers have metal leads wrapped around the edge of the package, in the shape of a letter J. Leadless chip carriers have metal pads on the edges. Chip carrier packages may be made of ceramic or plastic and are usually secured to a printed circuit board by soldering, though sockets can be used for testing.
|BCC||Bump chip carrier||-|
|CLCC||Ceramic lead-less chip carrier||-|
|LCC||Lead-less chip carrier||Contacts are recessed vertically.|
|LCC||Leaded chip carrier||-|
|LCCC||Leaded ceramic-chip carrier||-|
|DLCC||Dual lead-less chip carrier (ceramic)||-|
|PLCC||Plastic leaded chip carrier||-|
Pin grid arraysEdit
|OPGA||Organic pin-grid array||-|
|FCPGA||Flip-chip pin-grid array||-|
|PAC||Pin array cartridge||-|
|PGA||Pin-grid array||Also known as PPGA|
|CPGA||Ceramic pin-grid array||-|
|-||Flat-pack||Earliest version metal/ceramic packaging with flat leads|
|CQFP||Ceramic quad flat-pack||Similar to PQFP|
|BQFP||Bumpered quad flat-pack||-|
|DFN||Dual flat-pack||No lead|
|ETQFP||Exposed thin quad flat-package||-|
|PQFN||Power quad flat-pack||No-leads, with exposed die-pad[s] for heatsinking|
|PQFP||Plastic quad flat-package||-|
|LQFP||Low-profile quad flat-package||-|
|QFN||Quad flat no-leads package||Also called as micro lead frame (MLF).|
|QFP||Quad flat package||-|
|MQFP||Metric quad flat-pack||QFP with metric pin distribution|
|HVQFN||Heat-sink very-thin quad flat-pack, no-leads||-|
|SIDEBRAZE||[clarification needed]||[clarification needed]|
|TQFP||Thin quad flat-pack||-|
|VQFP||Very-thin quad flat-pack||-|
|TQFN||Thin quad flat, no-lead||-|
|VQFN||Very-thin quad flat, no-lead||-|
|WQFN||Very-very-thin quad flat, no-lead||-|
|UQFN||Ultra-thin quad flat-pack, no-lead||-|
|ODFN||Optical dual flat, no-lead||IC packaged in transparent packaging used in optical sensor|
Small outline packagesEdit
|CSOP||Ceramic small-outline package|
|DSOP||Dual small-outline package|
|HSOP||Thermally-enhanced small-outline package|
|mini-SOIC||Mini small-outline integrated circuit|
|MSOP||Mini small-outline package|
|PSOP||Plastic small-outline package|
|PSON||Plastic small-outline no-lead package|
|QSOP||Quarter-size small-outline package||The pin spacing are width of 0.635 mm.|
|SOIC||Small-outline integrated circuit||Also known as SOIC NARROW and SOIC WIDE|
|SOJ||Small-outline J-leaded package|
|SON||Small-outline no-lead package|
|SSOP||Shrink small-outline package|
|TSOP||Thin small-outline package||Example|
|TSSOP||Thin shrink small-outline package|
|TVSOP||Thin very-small-outline package|
|µMAX||Similar to a SOIC. (A Maxim trademark example)|
|WSON||Very-very-thin small-outline no-lead package|
|USON||Very-very-thin small-outline no-lead package||Slightly smaller than WSON|
|BL||Beam lead technology||Bare silicon chip, an early chip-scale package|
|CSP||Chip-scale package||Package size is no more than 1.2× the size of the silicon chip|
|TCSP||True chip-size package||Package is same size as silicon|
|TDSP||True die-size package||Same as TCSP|
|WCSP or WL-CSP or WLCSP||Wafer-level chip-scale package|
|MICRO SMD||-||Chip-size package (CSP) developed by National Semiconductor|
|COB||Chip-on-board||Bare silicon chip, that is usually an integrated circuit, is supplied without a package. It can often be identified by having a blob of black Epoxy instead of a square package. Also used for LEDs. In LEDs, the epoxy is poured into a mold which forms part of the package.|
|COF||Chip-on-flex||Variation of COB, where a chip is mounted directly to a flex circuit.|
|TAB||Tape-automated bonding||Variation of COF, where a flip chip is mounted directly to a flex circuit without the use of bonding wires.|
|COG||Chip-on-glass||Variation of COB, where a chip is mounted directly to a piece of glass - typically an LCD.|
Ball grid arrayEdit
|FBGA||Fine-pitch ball-grid array||A square or rectangular array of solder balls on one surface|
|LBGA||Low-profile ball-grid array||Also known as laminate ball-grid array|
|TEPBGA||Thermally-enhanced plastic ball-grid array||-|
|CBGA||Ceramic ball-grid array||-|
|OBGA||Organic ball-grid array||-|
|TFBGA||Thin fine-pitch ball-grid array||-|
|PBGA||Plastic ball-grid array||-|
|MAP-BGA||Mold array process - ball-grid array ||-|
|UCSP||Micro (μ) chip-scale package||Similar to a BGA (A Maxim trademark example)|
|μBGA||Micro ball-grid array||Ball spacing less than 1 mm|
|LFBGA||Low-profile fine-pitch ball-grid array||-|
|TBGA||Thin ball-grid array||-|
|SBGA||Super ball-grid array||Above 500 balls|
|UFBGA||Ultra-fine ball-grid array|
Transistor, diode, small-pin-count IC packagesEdit
- MELF: Metal electrode leadless face (usually for resistors and diodes)
- SOD: Small-outline diode.
- SOT: Small-outline transistor (also SOT-23, SOT-223, SOT-323).
- TO-XX: wide range of small pin count packages often used for discrete parts like transistors or diodes.
- TO-3: Panel-mount with leads
- TO-5: Metal can package with radial leads
- TO-18: Metal can package with radial leads
- TO-66: Similar shape to the TO-3 but smaller
- TO-92: Plastic-encapsulated package with three leads
- TO-126: Plastic-encapsulated package with three leads and a hole for mounting on a heat sink
- TO-220: Through-hole plastic package with a (usually) metal heat sink tab and three leads
- TO-247: Plastic-encapsulated package with three leads and a hole for mounting on a heat sink
- TO-251: Also called IPAK: SMT package similar to the DPAK but with longer leads for SMT or TH mounting
- TO-252: (also called SOT428, DPAK): SMT package similar to the DPAK but smaller
- TO-262: Also called I2PAK: SMT package similar to the D2PAK but with longer leads for SMT or TH mounting
- TO-263: Also called D2PAK: SMT package similar to the TO-220 without the extended tab and mounting hole
- TO-274: Also called Super-247: SMT package similar to the TO-247 without the mounting hole
- Clearance between IC body and PCB
- Total Height
- Lead Thickness
- Total carrier length
- Lead width
- Lead length
- Clearance between IC body and board
- Total height
- Lead thickness
- Total carrier length
- Lead width
- Lead length
- IC body width
- Lead-to-lead width
- Clearance between package body and PCB.
- Height of package from pin tip to top of package.
- Thickness of pin.
- Length of package body only.
- Pin width.
- Pin length from package to pin tip.
- Pin pitch (distance between conductors to the PCB).
- Width of the package body only.
- Length from pin tip to pin tip on the opposite side.
|DIP||Y||Dual inline package||8-DIP||6.2–6.48||7.62||7.7||9.2–9.8||2.54 (0.1 in)||3.05–3.6||1.14–1.73|
|32-DIP||15.24||2.54 (0.1 in)|
|LFCSP||N||Lead-frame chip-scale package||0.5|
|MSOP||Y||Mini small-outline package||8-MSOP||3||4.9||1.1||0.10||3||0.65||0.95||0.18||0.17–0.27|
|Y||Small-outline integrated circuit||8-SOIC||3.9||5.8–6.2||1.72||0.10–0.25||4.8–5.0||1.27||1.05||0.19–0.25||0.39–0.46|
|SSOP||Y||Shrink small-outline package||0.65|
|TDFN||N||Thin dual flat no-lead||8-TDFN||3||3||0.7–0.8||3||0.65||N/A||0.19–0.3|
|TSOP||Y||Thin small-outline package||0.5|
|TSSOP||Y||Thin shrink small-outline package||8-TSSOP||4.4||6.4||1.2||0.15||3||0.65||0.09–0.2||0.19–0.3|
|µSOP||Y||Micro small-outline package||µSOP-8||4.9||1.1||3||0.65|
|PLCC||N||Plastic leaded chip-carrier||1.27|
|CLCC||N||Ceramic leadless chip-carrier||48-CLCC||14.22||14.22||2.21||14.22||1.016||N/A||0.508|
|LQFP||Y||Low-profile Quad Flat Package||0.50|
|TQFP||Y||Thin quad flat-package||TQFP-44||10.00||12.00||0.35–0.50||0.80||1.00||0.09–0.20||0.30–0.45|
|TQFN||N||Thin quad flat no-lead|
|52-ULGA||12 mm||17 mm||0.65 mm|
|52-ULGA||14 mm||18 mm||0.10 mm|
A variety of techniques for interconnecting several chips within a single package have been proposed and researched:
- "CPU Collection Museum - Chip Package Information". The CPU Shack. Retrieved 2011-12-15.
- "Archived copy" (PDF). Archived from the original (PDF) on 2011-08-15. Retrieved 2011-02-03.CS1 maint: archived copy as title (link)
- "Integrated Circuit, IC Package Types; SOIC. Surface Mount Device Package". Interfacebus.com. Retrieved 2011-12-15.
- "National Semiconductor CERPACK Package Products". National.com. Archived from the original on 2012-02-18. Retrieved 2011-12-15.
- "National Semiconductor CQGP Package Products". National.com. Archived from the original on 2007-10-21. Retrieved 2011-12-15.
- "National's LLP Package". National.com. Archived from the original on 2011-02-13. Retrieved 2011-12-15.
- "LTCC Low Temperature Co-fired Ceramic". Minicaps.com. Retrieved 2011-12-15.
- Frye, R.C.; Gabara, T.J.; Tai, K.L.; Fischer, W.C.; Knauer, S.C. (1993). "Performance evaluation of MCM chip-to-chip interconnections using custom I/O buffer designs". IEEE Xplore - Performance evaluation of MCM chip-to-chip interconnections using custom I/O buffer designs. Ieeexplore.ieee.org. pp. 464–467. doi:10.1109/ASIC.1993.410760. ISBN 978-0-7803-1375-0.
- "National Semiconductor Launches New Generation of Ultra-Miniature, High Pin-Count Integrated Circuit Packages". National.com. Archived from the original on 2012-02-18. Retrieved 2011-12-15.
- Meyers, Michael; Jernigan, Scott (2004). Mike Meyers' A+ Guide to PC Hardware. The McGraw-Hill Companies. ISBN 978-0-07-223119-9.
-  Archived August 18, 2011, at the Wayback Machine
- "Press Releases - Motorola Mobility, Inc". Motorola.com. Retrieved 2011-12-15.
- "Xilinx new CPLDs with two I/O banks". Eetasia.com. 2004-12-08. Retrieved 2011-12-15.
- "Packages". Chelseatech.com. 2010-11-15. Retrieved 2011-12-15.
- "Archived copy". Archived from the original on 2008-11-20. Retrieved 2009-10-24.CS1 maint: archived copy as title (link)
- "CSP - Chip Scale Package". Siliconfareast.com. Retrieved 2011-12-15.
- "Understanding Flip-Chip and Chip-Scale Package Technologies and Their Applications - Maxim". Maxim-ic.com. 2007-04-18. Retrieved 2011-12-15.
- "Chip Scale Review Online". Chipscalereview.com. Retrieved 2011-12-15.
- "Packaging Technology | National Semiconductor – Package Drawings, Part Marking, Package Codes, LLP, micro SMD, Micro-Array". National.com. Archived from the original on 2010-08-01. Retrieved 2011-12-15.
- "Fairchild's TinyLogic family overview" (PDF). March 22, 2013. Archived from the original (PDF) on January 8, 2015.
- Proximity Communication - the Technology, 2004, archived from the original on 2009-07-18
|Wikimedia Commons has media related to Electronic component packages.|
- JEDEC JEP95 official list of all (over 500) standard electronic packages
- Fairchild Index of Package Information
- An illustrated listing of different package types, with links to typical dimensions/features of each
- Intersil packaging information
- Solder Pad Layout Dimensions
- International Microelectronics And Packaging Society