Talk:Position-independent code

Latest comment: 6 hours ago by Guy Harris in topic ELF

Unnamed section

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Note that although "position-independent code" is arguably more grammatical, common usage strongly favor the no-hyphen version, presumably because system programmers are only semi-literate. :-) Stan 14:15, 2 Apr 2004 (UTC)

Cesian programs

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I noticed that Evan added a link to to question the following sentence: However, [PIC] can be generated automatically with a Cesian program. The text was added by User:Mirad, who has only a few contributions. I'm going to go out on a limb and say I think the term is bogus. -- Wmahan. 22:09, 13 October 2005 (UTC)Reply

ELF

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Though this article doesn't mention it, nearly all of the details are basically specific to ELF, aren't they? I think this should be made clearer.

MikeHearn 21:27, 14 May 2006 (UTC)Reply

The ELF mechanisms are based on those used in SunOS 4.x, which used an a.out-based format. I think Mach-O in Mac OS X uses mechanisms that are similar in some ways, and perhaps the mechanisms used with 32-bit PA-RISC in HP-UX and used in Tru64 UNIX, and even the mechanisms used in AIX, are also similar, but, yes, the page should probably discuss that, perhaps giving terminological and technical differences between various UN*Xes. Guy Harris 22:06, 14 May 2006 (UTC)Reply
I've renamed the "Technical details" section to "SunOS 4.x and ELF", and added a reference to the original paper about the SunOS 4.x implementation. Guy Harris (talk) 21:03, 23 June 2024 (UTC)Reply

Relocation Work Required

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Although relocatable code requires much more fixup than does PIC, PIC still requires some fixup by the loader. For example when using a GOT, the GOT can contain absolute addresses that need to be fixed up based on where the module is loaded.

Yes, SunOS 4-style PIC (which is what ELF PIC is, and Mach-O PIC is probably influenced by SunOS 4 as well, given that the person who did a lot of work on the SunOS 4 dynamic linking went to NeXTno, the person I was thinking of wasn't mentioned in the Gingell et al paper on SunOS 4.x shared libraries, and NeXTStEP may have had a non-PIC shared library mechanism) add the GOT and PLT to point to of external symbols, so that the code that uses them doesn't need to be modified to relocate it and can be shared. Guy Harris (talk) 20:10, 23 June 2024 (UTC)Reply

What functions are inherited?

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As this page is linked from Library (computing) it should be somewhat more explicative.

In particular, the following sentence leaves much to be guessed:

This notably allows a shared library to inherit certain function calls from previously loaded libraries rather than e. g. using its own versions

Why is that an advantage? E.g., Can an executable that exports its own malloc() propagate it to loaded libraries? On the other hand, why can that inheritance be a problem? It may be useful to include a link to best programming practices or gotchas one should watch against. This is an example where Unix and Windows differ. Those differences are mentioned often, but is difficult to understand their semantic implications.

How does such inheritance propagate across the exec family of functions? In general, an executable can behave differently depending on which process loaded it, because the parent process can have a number of shared libraries already loaded in its address space. Where can one learn more about this topic?

194.243.254.190 11:44, 3 December 2006 (UTC)Reply

History: TSS

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I'd like to say something about the TSS/360 implementation of PIC which, to me, sounds a lot like current Linux implementations, but I'm not sure I have enough background. What earlier implementations existed? Peter Flass (talk) 11:43, 17 October 2013 (UTC)Reply

PIC and operating systems

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In "History" I eliminated the paragraph concerning the use of PIC to implement operating system overlays. For example OS/360 used SVC transient areas, but not necessarily PIC (type 1 and 2 SVCs). The Burroughs 5500 MCP falls into the category of segmented systems and was inherently PIC. Peter Flass (talk) 12:20, 17 October 2013 (UTC)Reply

I haven't thought about SVC transient routines for some years. As well as I remember, they are less than 4K, so should be able to address relative to the entry point. I believe also that they are reentrant, and so can't store into their space. Gah4 (talk) 05:57, 21 June 2024 (UTC)Reply
In OS/360 SVC transient areas are 1 KiB; in OS/VS1 they are 2 KiB and in OS/VS2 transient SVCs live in the LPA and there are no SVC transient areas. In all three cases SVC transient routines are supposed to be refreshable and reentrant.
The OS[a] preloads several base registers[1] for SVCs; note that the OS does not prload a register with the address of the SVC routine.
In practice, a transient SVC routine can get by with a single base register for the code. -- Shmuel (Seymour J.) Metz Username:Chatul (talk) 09:46, 21 June 2024 (UTC)Reply
Many years ago, I had the Fixed Task Supervisor PLM[2] which is probably the most readable of manuals describing the internals of OS/360. That is, no complications of MFT or MVT. Gah4 (talk) 21:13, 21 June 2024 (UTC)Reply
I found the MVT logic manuals[3][4] to be quite good, although I need to refer to the PCP manuals for some details. -- Shmuel (Seymour J.) Metz Username:Chatul (talk) 05:19, 23 June 2024 (UTC)Reply

Notes

  1. ^ I only describe OS/360, OS/VS1 and OS/VS2 (SVS) here. For MVS there is also a register for the ASCB.

References

  1. ^ "Programming Conventions for SVC Routines". System/360 Operating System: System Programmer's Guide (PDF). Systems Reference Library (Ninth ed.). IBM . June 1971. pp. 40-41. GC28-6550-9. Retrieved June 21, 2024.
  2. ^ Fixed-Task_Supervisor_PLM (PDF) (third ed.). IBM. September 1967. Y28-6612-2. Retrieved June 21, 2024.
  3. ^ OS Release 21 - IBM System/360 Operating System - MVT Supervisor - Program Number 360S-CI-535 (PDF). Program Logic (Eighth ed.). May 1973. GY28-6659-7.
  4. ^ IBM System/360 Operating System: MVT Job Management, Program Logic Manual, Program Number 360S-CI-535 - OS Release 21 (PDF) (Tenth ed.), IBM, March 1972, GY28-6660-9

Windows

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I removed some incorrect and irrelevant information about Windows and the relationship between PIC code and pre-linking. Pre-linking doesn't have much to do with PIC code. It has more to do with symbol resolution, which is for references that could potentially cross modules. PIC is more about references within a module.— Preceding unsigned comment added by 2001:4898:80e0:ee43::3 (talk) 00:06, 31 January 2015 (UTC)‎Reply

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Position-independent code#History has links for Multics and TSS/360. A recent edit by 70.92.191.178 added a second link for Multics, in the Multics section; there is no second link for TSS. Should I also link TSS/360 in the TSS section, or revert the edit? Shmuel (Seymour J.) Metz Username:Chatul (talk) 18:19, 6 July 2020 (UTC)Reply

WP:NPOV

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The section #Technical details describes a specific implementation, and as such should either be under the platform to which it applies or include the platform in the section name. In particular, not all implementations of PIC use a global offset table (GOT). --Shmuel (Seymour J.) Metz Username:Chatul (talk) 17:17, 6 September 2021 (UTC)Reply

It's more of an over-specificity issue than a neutrality issue; it's not saying this is the only right way to do PIC, it's saying "this is the way PIC is done" rather than, more specifically, "this is the way PIC is done in systems implemented using the SunOS 4.0 style of PIC and dynamic linking" (SVR4's system was based on the SunOS 4.0 one, and other systems such as Linux and the *BSDs that adopted SVR4's ELF also adopted its dynamic linking system; some other UN*Xes also modeled their systems after the SunOS 4.0 system). Guy Harris (talk) 19:04, 6 September 2021 (UTC)Reply

I think the endless disputes about how PIC works and what OSes are inferior and so on stem from conflating two terms/ideas under one command-line option (-fpic) in GCC: position independent code and interposition of symbols in ELF format. The later is used to make sure if a symbol is defined in multiple binaries then the earliest definition "wins" and a binary will use the winning definition even though the binary already contains its own implementation. Sadly the second concept has no page on the Wikipedia. And I do not think it is Wikipedia's job to untangle the misunderstanding. --Alvin-cs 17:53, 15 October 2021 (UTC)Reply

PC relative addressing

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As part of another article, it seems it would be useful to have an article on PC relative addressing. That makes PIC easier, and also simplifies some other addressing problems. It could go in Addressing mode, but I don't think that is the best place. It could go here, or have its own page. Gah4 (talk) 00:41, 21 June 2024 (UTC)Reply

There's already Addressing mode § PC-relative and Addressing mode § PC-relative 2. Is that not sufficient? Guy Harris (talk) 21:43, 21 June 2024 (UTC)Reply
The reason for the comment, is that I believe it is important enough to have its own article. One advantage, as noted, is the ease of writing PIC. (That is, for PC relative branching.) As I understand it, many processors can't put the same cache block into the data and code cache at the same time. That could be mentioned along with discussion of PC relative data addressing. I believe for ESA/390 processors, you are supposed to keep at least 256 bytes between instructions and data. Gah4 (talk) 00:58, 22 June 2024 (UTC)Reply
I believe it is important enough to have its own article Why?
One advantage, as noted, is the ease of writing PIC. (That is, for PC relative branching.) As I understand it, many processors can't put the same cache block into the data and code cache at the same time. But why does that justify a page for a particular type of addressing mode (which already appears in addressing mode), rather than, say, a note on position-independent code?
As I understand it, many processors can't put the same cache block into the data and code cache at the same time. [citation needed]. If the processor either flushes or updates the I-cache if a store is done into a location in the I-cache (I think that's the case for x86, for backward compatibility, and I suspect it's true for any split-I&D-cache {S/3x0, z/Architecture} processor, for the same reason), I don't see why the same cache line couldn't be in both caches. If the processor requires an explicit I-cache flush (which at least one SPARC v8 processor does), I'm not sure I see a problem with a store into a data location as long as it's not later used as an instruction, but in that case you'd need to do an I-cache flush anyway.
That could be mentioned along with discussion of PC relative data addressing. PC-relative data addressing is used heavily in UN*Xes; references to external data in PIC are done as indirect references through entries in the Global Offset Table (GOT), and the GOT for a module is at a fixed offset from the code for that module, known at the time the module is built, so references to the GOT are done with PC-relative (or, if PC relative data addressing isn't supported, beginning-of-the-routine-relative) addressing. The GOT and code aren't intermixed - there's a big blob of code and a smaller blob of GOT entries containing addresses of globals - so you won't see code and a GOT entry in the same cache line (or the same page. The data section of a module is also at a known-at-build-time offset from the code section, so PC-relative (or beginning-of-the-routine-relative) addressing can be used to refer to that data. Guy Harris (talk) 07:06, 22 June 2024 (UTC)Reply
Reminds me of what I used to do every time a new release of SunOS came out. As designed, SunOS uses YP/NIS for name resolution, not DNS. Sun supplies a PIC version of libc and the resolver routines, which ones has to link together to generate a new libc.so. But I never looked in detail of what was in the PIC version, especially as they didn't supply source. Gah4 (talk) 11:21, 22 June 2024 (UTC)Reply