Talk:A20 line

Latest comment: 13 years ago by Wtshymanski in topic DOS-programmers

old post edit

This is a really a note to myself but if anyone else wants to tackle before I get around to it then they can.

This article really additional information. Such as the segemented memory model of the x86 architecture and how this translates to the address lines of the chip. Also the 8042 chip should be mentioned in relation to its role with the A20 line. Mention AT and XT arcitectures. -- Popsracer 10:29, 31 Jul 2003 (UTC)

I'm extremely dubious of the expansion of the A in A20 as "above". I'm fairly certain that the name simply derives from the fact that the hardware implementation gated this signal from the keyboard controller (8042) with the address line A20 from the microprocessor. --Brouhaha 21:36, 14 Oct 2004 (UTC)

I removed the following information as it is misleading/incorrect.

"Letter "A" in the name A20 refers to "Above", while "20" refers to the 20th power of 2. (220 bytes = 1 Mbyte)"

A20 refers to Address line 21. In real mode there are 20 address lines A0-A19. With a 286, 386, etc, there are more than 20 address lines, ergo, the 21st address line is A20 and must be pulled low to enable to address wrapping mentioned in the article. Sure the power of 2 information is correct only coencidently in that every time you add an address line, you raise the addressable region by a power of two. In the context it was presented, it is misleading. I can't imagine a simple, relevant way to describe these things, I think its better to just let them be deleted. -- (unsigned) 2005-01-08T21:24:17‎ by IP 155.229.83.62

A20m should be disabled VMX instructions [From Wanchun Wang] -- (unsigned) 2007-10-17T09:25:02‎ by IP 69.232.205.79

Explain "wrap around" edit

This article would be more clear if somebody explained what does the "wrap around" exactly mean in this case, including real example. --81.219.244.145 (talk) 10:27, 15 June 2008 (UTC)Reply

Stop overcomplicating a simple physical implementation edit

Seriously, it's not that hard to understand, just link other terms such as "wraparound". This is ridiculous. ChazZeromus (talk) 04:20, 5 October 2009 (UTC)Reply

DOS-programmers edit

  • Because loading segment registers was very slow on early processors, this trick was used by some DOS programmers, for example, to have one segment that has access to program data (e.g. from F800:0000 to F800:7FFF, pointing to the physical addresses 0x000F8000 - 0x000FFFFF) as well as the I/O data (e.g. keyboard buffer) that was located in the first memory segment (with addresses F800:8000 to F800:FFFF pointing to the physical addresses 0x00000000 to 0x00007FFF).

a) I need a citation for this! b) I want to get explained why the programmers did this. What was the advantage in this method? mabdul 10:38, 10 December 2010 (UTC)Reply

a) It already says "loading segment registers was very slow". There was a time when programmers cared how fast their programs ran, and relied on their own efforts rather than Intel to speed up programs.
b) Pretty standard discussion in any text of that time, one that comes to mind is Robert Jourdain Programmer's problem solver, 1992, but my copy isn't yet unpacked. --Wtshymanski (talk) 14:59, 10 December 2010 (UTC)Reply
a)I did understand the second part and hope that this time get a revival ^^ - did I understand this now correctly: because the programmers don't want to wait on Intel creating a faster way, the used the "trick" to get the needed data from the segment register by addressing them not over the normal way rather the modified "direct" address? mabdul 15:24, 10 December 2010 (UTC)Reply
I've no idea what you understand, I certainly don't understand you. --Wtshymanski (talk) 17:08, 10 December 2010 (UTC)Reply
Guys, I just looked this up and in fact on the 8088 loading registers is not particularly slow, it takes the same number of cycles as writing any other register. Rather, it's a matter of the programmers wanting to squeeze every last bit of performance out of the chip.
-- (unsigned) 2016-08-24T13:16:04‎ by IP 80.114.146.117