The ModR/M byte is an important part of instruction encoding for the x86 instruction set.

Description edit

Opcodes in x86 are generally one-byte, though two-byte instructions and prefixes exist. ModR/M is the byte following the opcode and adds additional information for how the instruction is executed.[1]: §2.1  The format is:

Bit 7 6 5 4 3 2 1 0
Usage MOD REG R/M

where REG specifies a register and R/M may contain a register or specify an addressing mode, depending upon the value of MOD.

Some instructions cannot make use of the REG portion of the ModR/M byte. Many of these instructions are "multiplexed" using this field, where a single opcode can refer to multiple instructions, and the REG field determines the instruction. In opcode listings, these are specified by following the opcode with a slash (/) and a digit 0-7.[1]: §3.1.1.1 

64-bit changes edit

The ModR/M byte is central to the changes introduced with AMD's 64-bit extension to the original instruction set. In long mode, any opcode whose highest four bits are 0100 (decimal 4) are considered to be a new prefix, the REX prefix.[2]: §1.2.7  The lowest four bits of the prefix byte serve various purposes, including an extra bit for the REG and R/M fields of the ModR/M byte that follows. Among other changes, expanding these values from three bits to four doubles the number of available processor registers from eight to sixteen.[2]: §1.4 

SIB byte edit

The SIB byte is an optional post-opcode byte in x86 assembly on the i386 and later, used for complex addressing.

SIB bytes are formatted similarly to ModR/M bytes, and take the form of (scale * index) + base + displacement, where the SCALE is 1, 2, 4, or 8. BASE and INDEX each encode a register.[3] The displacement is a constant offset encoded after the SIB byte which is applied to the final address.[4]

A REX prefix can optionally allow the SIB byte to use SSE registers.[1]

Bit 7 6 5 4 3 2 1 0
Usage SCALE INDEX BASE

References edit

  1. ^ a b c Intel Corporation (2016-09-01). "Intel® 64 and IA-32 Architectures Software Developer's Manual, Volume 2A". Retrieved 2021-09-13.
  2. ^ a b Advanced Micro Devices (2021-03-01). "AMD64 Architecture Programmer's Manual Volume 3: General-Purpose and System Instructions" (PDF). Retrieved 2021-09-13.
  3. ^ Hartman, Chris. "Encoding instructions". University of Alaska Fairbanks. Retrieved 28 July 2022.
  4. ^ "80386 Programmer's Reference Manual -- Section 17.2". www.scs.stanford.edu. Retrieved 28 July 2022.

See also edit