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File:IIc Plus motherboard.JPG

Original file (693 × 678 pixels, file size: 257 KB, MIME type: image/jpeg)

Description

An image of the Apple IIc Plus motherboard, with overlay diagram pointing out new feature components:

1=MIG and supporting SRAM buffer, 2=Internal modem connector, 3=Accelerator cache (TAG and DATA), 4=Accelerator ASIC, 5=CPU (4 MHz 65C02), 6=IIc Plus Memory Expansion connector.
Source Photograph/scan taken by Mark Frischknecht and edited by Mitchell Spector. Used with permission.
Author User Apple2gs on en.wikipedia
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GNU head Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.2 or any later version published by the Free Software Foundation; with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. A copy of the license is included in the section entitled GNU Free Documentation License.
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attribution share alike 		This file is licensed under the Creative Commons Attribution-Share Alike 3.0 Unported license.
Attribution: Apple2gs
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Originally from en.wikipedia; description page is (was) here

* 05:13, 1 April 2006 [[:en:User:Apple2gs|Apple2gs]] 693×678 (262,889 bytes) <span class="comment">(An image of the Apple IIc Plus motherboard, with overlay diagram pointing out new feature components: 1=MIG and supporting SRAM buffer, 2=Internal modem connector, 3=Accelerator cache (TAG and DATA), 4=Accelerator ASIC, 5=CPU (4 MHz 65C02), 6=IIc Plus M)</span>

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Date/TimeThumbnailDimensionsUserComment
current13:02, 10 August 2006Thumbnail for version as of 13:02, 10 August 2006693 × 678 (257 KB)Liftarn{{Information| |Description=An image of the Apple IIc Plus motherboard, with overlay diagram pointing out new feature components: 1=MIG and supporting SRAM buffer, 2=Internal modem connector, 3=Accelerator cache (TAG and DATA), 4=Accelerator ASIC, 5=CPU

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