Visual Instruction Set
VIS 2 was first implemented by the UltraSPARC III. All subsequent UltraSPARC and SPARC64 microprocessors implement the instruction set.
VIS 3 was first implemented in the SPARC T4 microprocessor.
Differences vs x86
However VIS is not an instruction toolkit like Intel's MMX and SSE. MMX has only 8 registers shared with the FPU stack, while SPARC processors have 32 registers, also aliased to the double-precision (64-bit) floating pointer registers.
As with the SIMD instruction set extensions on RISC processors, VIS strictly conform to the main principle of RISC: keep the instruction set concise and efficient.
Sometimes programmers must use several VIS instructions to accomplish an operation that can be done with only one MMX or SSE instruction, but it should be kept in mind that fewer instructions doesn't automatically result in better performance.
VIS re-uses existing SPARC V9 64-bit floating point registers to hold multiple 8, 16, or 32-bit integer values. In this respect VIS is more similar to the design of MMX than other SIMD architectures such as SSE/SSE2/AltiVec.
VIS includes a number of operations primarily for graphics support, so most of them are only for integers. These include 3D to 2D conversion, edge processing and pixel distance.
There are four ways to use VIS in code:
- The GCC -mvis option
- Use inline assembly
- Use inline template in VSDK, similar to compiler intrinsics, which have C function like interfaces
- Use the mediaLib multimedia library, which has C function interfaces. It uses VIS on SPARC platforms (and MMX/SSE/SSE2 on x86/x64 platforms) to accelerate multimedia application execution
- Liang He; Harlan McGhan (May 2005). "MT mediaLib for Chip MultiThreaded (CMT) Processors" (PDF). Sun Microsystems, Inc. Retrieved 2007-12-03.
- An introduction to SPARC’s SIMD offerings (small tutorial)
- UltraSPARC and VIS Instruction Set Extensions
- GCC SPARC VIS Built-in Functions