Talk:Clock domain crossing

Bad Link

In the External Links section the first reference is no longer accessible. "Clock domain crossing - Closing the loop on clock domain functional implementation problems". It needs to be updated or removed. Gnuarm (talk) 13:58, 18 October 2014 (UTC)

January 2013 Major Re-Write

I am planning a major re-write of this article. I want to improve the technical tone, use a selection of good sources and references, and avoid commercial trade publication articles that have POV. I would also like to introduce some diagrams that illustrate key ideas. Lastly, CDC is a verification problem for modern digital design and I believe needs to be addressed in this topic or another appropriate article. MilpitasGraham (talk) 00:35, 18 January 2014 (UTC)

Synchronization in Asynchronously Communicating Digital Systems

Removing this section that references the article "Synchronization in Asynchronously Communicating Digital Systems" by Priyadharshini Shanmugasundaram, since it does not address clock domain crossing but is a report on "the merits and demerits of asynchronous design techniques over synchronous techniques." It is an unpublished article as well. MilpitasGraham (talk) 00:20, 21 January 2014 (UTC)

Clock domain?

What is a clock domain? Where do we encounter such things? Thanks, --Abdull (talk) 14:19, 25 August 2008 (UTC)

Yes, I agree that Wikipedia should describe a "clock domain" in some article or another.

I added a rough draft of a definition of "clock domain" to this article.

--DavidCary (talk) 06:43, 19 December 2013 (UTC)

Dear reader,

What do you think about renaming this article to "clock domain"?

(The current title "clock domain crossing" would become a subheading in the "clock domain" article). --DavidCary (talk) 06:43, 19 December 2013 (UTC)

I agree, renaming the title is a better option, "Clock Domain Crossing" can be a sub heading under this title. --Deepon (talk) 17:28, 25 December 2013 (UTC)

Is this article entirely true?

I agree that 66 MHz is typically the limit for traditional PCBs. Once you get to 50 MHz and higher with ATA UDMA drives, you had to use special cables that inserted grounds between every signal wire to increase shielding and reduce crosstalk.

Now, the article says that CPUs over that speed are invariably single-chip CPUs. Okay, then how do you explain the team of hobbyists who have made great progress on a 100 MHz 6502 CPU clone using discrete SMD components? 2002:4443:FE62:0:0:0:4443:FE62 (talk) 08:09, 10 July 2023 (UTC)