Wikipedia

RDNA 3

RDNA 3 is a GPU microarchitecture designed by AMD, released with the Radeon RX 7000 series on December 13, 2022. Alongside powering the RX 7000 series, RDNA 3 is also featured in the SoCs designed by AMD for the Asus ROG Ally and Lenovo Legion Go consoles.

RDNA 3
LaunchedDecember 13, 2022; 16 months ago (2022-12-13)
Designed byAMD
Manufactured by
Fabrication process
Codename(s)
  • Navi 31: Plum Bonito
  • Navi 32: Wheat Nas
  • Navi 33: Hotpink Bonefish
Product Series
Desktop
Professional/workstation
Specifications
Compute
  • Up to 122.8 TFLOPS (FP16)
  • Up to 61.42 TFLOPS (FP32)
  • Up to 1.919 TFLOPS (FP64)
Clock rate1500 MHz to 2500 MHz
Shader clock rate2269 MHz
L0 cache64 KB (per WGP):
  • 32 KB instructions cache
  • 16 KB K data cache
L1 cache256 KB per array
L2 cache6 MB
L3 cacheup to 96 MB (16 MB per MCD)
Memory supportGDDR6
Memory clock rate20 Gbps
PCIe supportPCIe 4.0
Supported Graphics APIs
Direct3DDirect3D 12.0 Ultimate (feature level 12_2)
Shader ModelShader Model 6.7
OpenCLOpenCL 2.1
OpenGLOpenGL 4.6
VulkanVulkan 1.3
Media Engine
Encode codecs
Decode codecs
Color bit-depth
  • 8-bit
  • 10-bit
  • 12-bit
Encoder(s) supported
  • AMF
  • VCE
Display outputs
History
PredecessorRDNA 2
VariantCDNA 3 (datacenter)
SuccessorRDNA 4
Support status
Supported

Background edit

On June 9, 2022, AMD held their Financial Analyst Day where they presented a client GPU roadmap which contained mention of RDNA 3 coming in 2022 and RDNA 4 coming in 2024.[1] AMD announced to investors their intention to achieve a performance-per-watt uplift of over 50% with RDNA 3 and that the upcoming architecture would be built using chiplet packaging on a 5 nm process.[2]

A sneak preview for RDNA 3 was included towards the end of AMD's Ryzen 7000 unveiling event on August 29, 2022. The preview included RDNA 3 running gameplay of Lies of P, AMD CEO Lisa Su confirming that a chiplet design would be used, and a partial look at AMD's reference design for an RDNA 3 GPU.[3]

Full details for the RDNA 3 architecture were unveiled on November 3, 2022 at an event in Las Vegas.[4]

Architecture edit

Chiplet packaging edit

For the first time ever in a consumer GPU, RDNA 3 utilizes modular chiplets rather than a single large monolithic die. AMD previously had great success with its use of chiplets in its Ryzen desktop and Epyc server processors.[5] The decision to move to a chiplet-based GPU microarchitecture was led by AMD Senior Vice President Sam Naffziger who had also lead the chiplet initiative with Ryzen and Epyc.[6] The development of RDNA 3's chiplet architecture began towards the end of 2017 with Naffziger leading the AMD graphics team in the effort.[7] The benefit of using chiplets is that dies can be fabricated on different process nodes depending on their functions and intended purpose. According to Naffziger, cache and SRAM do not scale as linearly as logic does on advanced nodes like N5 in terms of density and power consumption so they can instead be fabricated on the cheaper, more mature N6 node. The use of smaller dies rather than one large monolithic die is beneficial for maximizing wafer yields as more dies can be fitted onto a single wafer.[7] Alternatively, a large monolithic RDNA 3 die built on N5 would be more expensive to produce with lower yields.

RDNA 3 uses two types of chiplets: the Graphics Compute Die (GCD) and Memory Cache Dies (MCDs). On Ryzen and Epyc processors, AMD used its PCIe-baed Infinity Fabric protocol with the package's dies connected via traces on an organic substrate. This approach is easily scalable in a cost-effective manner but has the drawbacks of increased latency, increased power consumption when moving data between dies at around 1.5 picojoules per bit, and it cannot achieve the connection density needed for high-bandwidth GPUs.[8] An organic package could not host the number of wires that would be needed to connect multiple dies in a GPU.[9]

RDNA 3's dies are instead connected using TSMC's Integrated Fan-Out Re-Distribution Layer (InFO-RDL) packaging technique which provides a silicon bridge for high bandwidth and high density die-to-die communication.[10] InFO allows dies to be connected without the use of a more costly silicon interposer such as the one used in AMD's Instinct MI200 and MI300 datacenter accelerators. Each Infinity Fanout link has 9.2 Gbps in bandwidth. Naffziger explains that "The bandwidth density that we achieve is almost 10x" with the Infinity Fanout rather than the wires used by Ryzen and Epyc processors. The chiplet interconnects in RDNA achieve cumulative bandwidth of 5.3 TB/s.[10]

Memory Cache Dies (MCDs) edit

With a respective 2.05 billion transistors, each Memory Cache Die (MCD) contains 16 MB of L3 cache. Theoretically, additional L3 cache could be added to the MCDs via AMD's 3D V-Cache die stacking technology as the MCDs contain unused TSV connection points.[11][12] Also present on each MCD are two physical 32-bit GDDR6 memory interfaces for a combined 64-bit interface per MCD.[13] The Radeon RX 7900 XTX has a 384-bit memory bus through the use of six MCDs while the RX 7900 XT has a 320-bit bus due to its five MCDs.

Graphics Compute Die (GCD) edit

Compute Units edit

RDNA 3's Compute Units (CUs) for graphics processing are organized in dual CU Work Group Processors (WGPs). Rather than including a very large number of WGPs in RDNA 3 GPUs, AMD instead focussed on improving per-WGP throughput. This is done with improved dual-issue shader ALUs with the ability to execute two instructions per cycle. It can contain up to 96 graphics Compute Units that can provide up to 61 TFLOPS of compute.[14] Each RDNA 3 Compute Unit has dedicated AI acceleration with Wave MMA (matrix multiply-accumulate) instructions,[15] which can improve AI-based performance by 2.7x and also benefits ray tracing instructions, similar to Nvidia's Tensor cores.[14]

Ray tracing edit

RDNA 3 features second generation ray-tracing accelerators. Each Compute Unit contains one ray tracing accelerator. The overall number of ray tracing accelerators is increased due to the higher number of Compute Units, though the number of ray tracing accelerators per Compute Unit has not increased over RDNA 2.

Clock speeds edit

RDNA 3 was designed to support high clock speeds. On RDNA 3, clock speeds have been decoupled with the front end operating at a 2.5 GHz frequency while the shaders operate at 2.3 GHz. The shaders operating at a lower clock speed gives up to 25% power savings according to AMD and RDNA 3's shader clock speed is still 15% faster than RDNA 2.[16]

Cache and memory subsystem edit

RDNA 3 increased the capacity of L1 and L2 caches. The 16-way associative L1 cache shared across a shader array is doubled in RDNA 3 to 256 KB. The L2 cache increased from 4 MB on RDNA 2 to 6 MB on RDNA 3. The L3 Infinity Cache has been lowered in capacity from 128 MB to 96 MB and latency has increased as it is physically present on the MCDs rather than being closer to the WGPs within the GCD.[17] The Infinity Cache capacity was decreased due to RDNA 3 having wider a memory interface up to 384-bit whereas RDNA 2 used memory interfaces up to 256-bit. RDNA 3 having a wider 384-bit memory means that its cache hitrate does not have to be as high to still avoid bandwidth bottlenecks as there is higher memory bandwidth.[17] RDNA 3 GPUs use GDDR6 memory rather than faster GDDR6X due to the latter's increased power consumption.

Media engine edit

RDNA 3 is the first RDNA architecture to have a dedicated media engine. It is built into the GCD and is based on VCN 4.0 encoding and decoding core.[18] AMD's AMF AV1 encoder is comparable in quality to Nvidia's NVENC AV1 encoder but can handle a higher number of simultaneous encoding streams compared to the limit of 3 on the GeForce RTX 40 series.[19]

Supported encoding frame rates (FPS) per resolution and video coding format[20]
Resolution H.264 H.265 AV1
1080p60 360 360 360
1440p60 360 360 360
4K60 180 180 240
8K60 48 48 60

Display engine edit

RDNA 3 GPUs feature a new display engine called the "Radiance Display Engine". AMD touted its support for DisplayPort 2.1 UHBR 13.5, delivering up to 54Gbps bandwidth for high refresh rates at 4K and 8K resolutions.[21] The Radeon Pro W7900 and W7800 support the 80Gbps UHBR20 standard. DisplayPort 2.1 can support 4K at 480 Hz and 8K at 165 Hz with Display Stream Compression (DSC). The previous DisplayPort 1.4 standard with DSC was limited to 4K at 240 Hz and 8K at 60 Hz.

Power efficiency edit

AMD claims that RDNA 3 achieves a 54% increase in performance-per-watt which is in line with their previous claims of 50% performance-per-watt increases for both RDNA and RDNA 2.

Navi 3x dies edit

Graphics Compute Die (GCD) Memory Cache Die
(MCD)
Navi 31[13] Navi 32 Navi 33
Launch Dec 2022 Aug 2023 Jan 2023 Dec 2022
Codename Plum Bonito Wheat Nas Hotpink Bonefish —
Compute units
(Stream processors)
[FP32 cores] 		96
(6144)
[12288] 		60
(3840)
[7680] 		32
(2048)
[4096]
Process TSMC N5 TSMC N6
Transistors 45.4B 19.9B 13.3B 2.05B
Transistor density 150.2 MTr/mm2 101.5 MTr/mm2 65.2 MTr/mm2 54.64 MTr/mm2
Die size 304.35 mm2 196 mm2 204 mm2 37.52 mm2
Max TDP 405 W 263 W 200 W —
Products Consumer Desktop
  • RX 7900 GRE
  • RX 7900 XT
  • RX 7900 XTX
  • RX 7700 XT
  • RX 7800 XT
  • RX 7600
  • RX 7600 XT
  • RX 7700 XT (3×)
  • RX 7800 XT (4×)
  • RX 7900 GRE (4×)
  • RX 7900 XT (5×)
  • RX 7900 XTX (6×)
Mobile
  • RX 7900M
 —
  • RX 7600S
  • RX 7600M
  • RX 7600M XT
  • RX 7700S
  • RX 7900M (4×)
Workstation Desktop
  • W7800
  • W7900
  • W7700
  • W7500
  • W7600
  • W7700 (4×)
  • W7800 (4×)
  • W7900 (6×)
Mobile — — — —

Products edit

Desktop edit

Model
(Code name) 		Release Date
& Price 		Architecture
& fab 		Chiplets Transistors
& die size[a] 		Core Fillrate[b][c][d] Processing power[b][e]
(TFLOPS) 		Infinity Cache Memory TBP Bus
nterface
Config[f][g] Clock[b]
(MHz) 		Texture
(GT/s) 		Pixel
(GP/s) 		Half Single Double Size Bandwidth
(GB/s) 		Size Bandwidth
(GB/s) 		Bus type
& width 		Clock
(MT/s)
Radeon RX 7600
(Navi 33)[23] 		May 25, 2023
$269 USD 		RDNA 3
TSMC N6 		Monolithic 13.3×109
204 mm2 		32 CUs
2048:128:64:32:64 		1720
2655 		220.2
339.8 		110.1
169.9 		28.18
43.50 		14.09
21.75 		0.440
0.680 		32 MB 476.9 8 GB 288 GDDR6
128-bit 		18000 165 W PCIe 4.0
×8
Radeon RX 7600 XT
(Navi 33)[24][25] 		Jan 24, 2024
$329 USD 		1720
2755 		220.2
352.6 		110.1
176.3 		28.18
45.14 		14.09
22.57 		0.440
0.705 		16 GB 190 W
Radeon RX 7700 XT
(Navi 32)[26] 		Sep 6, 2023
$449 USD 		RDNA 3
TSMC N5 (GCD)
TSMC N6 (MCD) 		1 × GCD
3 × MCD 		28.1×109
346 mm2 		54 CUs
3456:216:96:54:108 		1900
2544 		410.4
549.5 		182.4
244.2 		52.53
70.34 		26.27
35.17 		0.821
1.099 		48 MB 1995 12 GB 432 GDDR6
192-bit 		245 W PCIe 4.0
×16
Radeon RX 7800 XT
(Navi 32)[27] 		Sep 6, 2023
$499 USD 		1 × GCD
4 × MCD 		60 CUs
3840:240:96:60:120 		1800
2430 		432
583.2 		172.8
233.2 		55.30
74.65 		27.64
37.32 		0.864
1.166 		64 MB 2708 16 GB 624 GDDR6
256-bit 		19500 263 W
Radeon RX 7900 GRE
(Navi 31)[28] 		Jul 27, 2023
China only,
Feb 27, 2024
$549 USD 		57.7×109
529 mm2 		80 CUs
5120:320:192:80:160 		1270
2245 		406.4
718.4 		243.8
431.0 		52.02
91.96 		26.01
45.98 		0.813
1.437 		2250 576 18000 260 W
Radeon RX 7900 XT
(Navi 31)[29] 		Dec 13, 2022
$899 USD 		1 × GCD
5 × MCD 		84 CUs
5376:336:192:84:168 		1500
2400 		504.0
806.4 		288.0
460.8 		64.51
103.2 		32.26
51.61 		1.008
1.613 		80 MB 2900 20 GB 800 GDDR6
320-bit 		20000 315 W
Radeon RX 7900 XTX
(Navi 31)[30] 		Dec 13, 2022
$999 USD 		1 × GCD
6 × MCD 		96 CUs
6144:384:192:96:192 		1900
2500 		729.6
960.0 		364.8
480.0 		93.39
122.9 		46.69
61.44 		1.459
1.920 		96 MB 3500 24 GB 960 GDDR6
384-bit 		355 W
  1. ^ Approximate die size of entire MCM package that consists of single GCD (Graphics Compute Die) and six MCDs (Memory Cache Die).
    The Radeon RX 7900 XT has only five active MCDs, while the inactive one is for structural support and heat dissipation. Die size of GCD is 306 mm2, size of each MCD is 37.5 mm2.[22]
  2. ^ a b c Boost values (if available) are stated below the base value in italic.
  3. ^ Texture fillrate is calculated as the number of Texture Mapping Units multiplied by the base (or boost) core clock speed.
  4. ^ Pixel fillrate is calculated as the number of Render Output Units multiplied by the base (or boost) core clock speed.
  5. ^ Precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
  6. ^ Compute Units (CUs)
    Unified shaders : Texture mapping units : Render output units : Ray accelerators : AI accelerators
  7. ^ GPUs based on RDNA 3 have dual-issue stream processors so that up to two shader instructions can be executed per clock cycle under certain parallelism conditions.

Mobile edit

Model
(Code name) 		Release
date 		Architecture
& fab 		Chiplets Transistors
& die size 		Core Fillrate[a][b][c] Processing power[a][d]
(TFLOPS) 		Infinity
Cache 		Memory TDP Interface
Config[e] Clock[a]
(MHz) 		Texture
(GT/s) 		Pixel
(GP/s) 		Half Single Double Size Bandwidth
(GB/s) 		Bus type
& width 		Clock
(MT/s)
Radeon RX 7600S
(Navi 33)[31] 		Jan 4, 2023 RDNA 3
TSMC N6 		Monolithic 13.3×109
204 mm2 		28 CUs
1792:112:64:28:56 		1500
2200 		168.0
246.4 		96.00
140.8 		21.50
31.54 		10.75
15.77 		0.336
0.493 		32 MB 8 GB 256 GDDR6
128-bit 		16000 75 W PCIe 4.0
×8
Radeon RX 7600M
(Navi 33)[32] 		1500
2410 		168.0
269.9 		96.0
154.2 		21.50
34.55 		10.75
17.28 		0.336
0.540 		90 W
Radeon RX 7600M XT
(Navi 33)[33] 		32 CUs
2048:128:64:32:64 		1500
2615 		192.0
334.1 		96.00
167.0 		24.58
42.84 		12.29
21.42 		0.384
0.669 		288 18000 120 W
Radeon RX 7700S
(Navi 33)[34] 		1500
2500 		192.0
320.0 		96.0
160.0 		24.58
40.96 		12.29
20.48 		0.384
0.640 		100 W
Radeon RX 7900M
(Navi 31)[35] 		Oct 19, 2023 RDNA 3
TSMC N5 (GCD)
TSMC N6 (MCD) 		1 × GCD
4 × MCD 		57.7×109
529 mm2 		72 CUs
4608:288:192:72:144
2090
601.9
401.3
77.05
38.52
1.204 		64 MB 16 GB 576 GDDR6
256-bit 		180 W PCIe 4.0
×16
  1. ^ a b c Boost values (if available) are stated below the base value in italic.
  2. ^ Texture fillrate is calculated as the number of Texture Mapping Units multiplied by the base (or boost) core clock speed.
  3. ^ Pixel fillrate is calculated as the number of Render Output Units multiplied by the base (or boost) core clock speed.
  4. ^ Precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
  5. ^ Unified shaders : Texture mapping units : Render output units : Ray accelerators : AI accelerators and Compute units (CU)

Workstation edit

Main article: Radeon Pro W7000 series

Desktop workstation edit

Model
(Code name) 		Release Date
& Price 		Architecture
& fab 		Chiplets
(active) 		Transistors
& die size[a] 		Core Fillrate[b][c][d] Processing power[b][e]
(TFLOPS) 		Infinity
Cache 		Memory TDP Bus
interface
Config[f][g] Clock[b]
(MHz) 		Texture
(GT/s) 		Pixel
(GP/s) 		Half Single Double Size
(GB) 		Bandwidth
(GB/s) 		Bus type
& width 		Clock
(MT/s)
Radeon Pro W7500
(Navi 33)[36][37][38] 		Aug 3, 2023
$429 USD 		RDNA 3
TSMC N6 		— 13.3×109
204 mm2 		1792:112:64
28:56:28 CU
1700
190.4
108.8
24.37
12.19
0.381 		32 MB 8 172 GDDR6
128-bit 		18000 70 W PCIe 4.0
×8
Radeon Pro W7600
(Navi 33)[39][37][40] 		Aug 3, 2023
$599 USD 		2048:128:64
32:64:32 CU
2440
312.3
156.2
39.98
19.99
0.625 		288 130 W
Radeon Pro W7700
(Navi 32)[41] 		Nov 13, 2023
$999 USD 		RDNA 3
TSMC N5 (GCD)
TSMC N6 (MCD) 		1 × GCD
4 × MCD 		28.1×109
~346 mm2 		3072:192:96
48:96:48 CU 		2300 441.6 220.8 56.54 28.3 0.884 64 MB 16 576 GDDR6
256-bit 		190 W PCIe 4.0
×16
Radeon Pro W7800
(Navi 31)[42][43][44] 		2023
$2499 USD 		57.7×109
~531 mm2 		4480:280:128
70:128:70 CU
2525
707
323.2
90.50
45.25
1.414 		32 260 W
Radeon Pro W7900
(Navi 31)[45][43][46] 		2023
$3999 USD 		1 × GCD
6 × MCD 		6144:384:192
96:192:96 CU
2495
958.1
479
122.6
61.32
1.916 		96 MB 48 864 GDDR6
384-bit 		295 W
  1. ^ Approximate die size of entire MCM package that consists of single GCD (Graphics Compute Die) and six MCDs (Memory Cache Die).
    Radeon Pro W7800 has only four active MCDs, inactive one is for structural support and heat dissipation.
  2. ^ a b c Boost values (if available) are stated below the base value in italic.
  3. ^ Texture fillrate is calculated as the number of Texture Mapping Units multiplied by the base (or boost) core clock speed.
  4. ^ Pixel fillrate is calculated as the number of Render Output Units multiplied by the base (or boost) core clock speed.
  5. ^ Precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
  6. ^ Unified shaders : Texture mapping units : Render output units : Ray accelerators : AI accelerators and Compute units (CU)
  7. ^ GPUs based on RDNA 3 have dual-issue stream processors so that up to two shader instructions can be executed per clock cycle under certain parallelism conditions.

Integrated graphics processing units (iGPUs) edit

Model Launch Codename Architecture
& fab 		Die
size 		Core Fillrate[a][b][c] Processing power[a][d]
(GFLOPS) 		Cache TDP
Config[e][f] Clock[a]
(MHz) 		Texture
(GT/s) 		Pixel
(GP/s) 		Half
[FP16] 		Single
[FP32] 		Double
[FP64] 		L0 L1 L2
Radeon 740M Apr 2023 Phoenix RDNA 3
TSMC N4P 		178 mm2 4 CUs
256:16:8:4 		2,500 40.0 20.0 5,120 2,560 80.0 64 KB 512 KB 2 MB 15–30 W
Radeon 760M 8 CUs
512:32:16:8 		1,000
2,600 		32.0
83.2 		21.3
55.5 		4,096
10,649 		2,048
5,324 		64.0
166.4 		128 KB 1 MB 35–65 W
Radeon 780M 12 CUs
768:48:24:12 		2,500 40.0 20.0 5,120 2,560 80.0 192 KB 1.5 MB
Ryzen Z1 Jun 13, 2023 4 CUs
256:16:8:4 		2,500 40.0 20.0 5,120 2,560 80.0 64 KB 512 KB 9–30 W
Ryzen Z1 Extreme 12 CUs
768:48:24:12 		2,800 134.4 67.2 17,203 8,600 268.8 192 KB 1.5 MB
  1. ^ a b c Boost values (if available) are stated below the base value in italic.
  2. ^ Texture fillrate is calculated as the number of Texture Mapping Units multiplied by the base (or boost) core clock speed.
  3. ^ Pixel fillrate is calculated as the number of Render Output Units multiplied by the base (or boost) core clock speed.
  4. ^ Precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
  5. ^ Compute Units (CUs)
    Stream Processors : Texture mapping units : Render output units : Ray accelerators
  6. ^ GPUs based on RDNA 3 have dual-issue stream processors so that up to two shader instructions can be executed per clock cycle under certain parallelism conditions.

References edit

  1. ^ Smith, Ryan (June 9, 2022). "AMD's 2022-2024 Client GPU Roadmap: RDNA 3 This Year, RDNA 4 Lands in 2024". AnandTech. Retrieved April 8, 2023.
  2. ^ Walton, Jarred (June 9, 2022). "AMD GPU Roadmap: RDNA 3 With 5nm GPU Chiplets Coming This Year". Tom's Hardware. Retrieved April 8, 2023.
  3. ^ Wickens, Katie (August 31, 2022). "AMD's Lisa Su confirms chiplet-based RDNA 3 GPU architecture". PC Gamer. Retrieved April 8, 2023.
  4. ^ "AMD Unveils World's Most Advanced Gaming Graphics Cards, Built on Groundbreaking AMD RDNA 3 Architecture with Chiplet Design". AMD (Press release). Las Vegas, NV. November 3, 2022. Retrieved April 8, 2023.
  5. ^ James, Dave (June 24, 2022). "AMD suggests a Ryzen-like design for RDNA 3 chiplets would be 'a reasonable inference'". PC Gamer. Retrieved April 8, 2023.
  6. ^ Alcorn, Paul; Walton, Jarred (June 23, 2022). "Into the GPU Chiplet Era: An Interview With AMD's Sam Naffziger". Tom's Hardware. Retrieved April 8, 2023.
  7. ^ a b Brosdahl, Peter (November 22, 2022). "AMD Lead Engineer Sam Naffziger Explains Advantages of RDNA3 Chiplet Design". The FPS Review. Retrieved April 8, 2023.
  8. ^ Walton, Jarred (June 5, 2023). "AMD RDNA 3 GPU Architecture Deep Dive: The Ryzen Moment for GPUs". Tom's Hardware. Retrieved April 29, 2024.
  9. ^ Ridley, Jacob (November 14, 2022). "AMD's Infinity Links is the unsung hero of RDNA 3 and chiplet gaming GPUs". PC Gamer. Retrieved April 29, 2024.
  10. ^ a b "AMD Explains the Economics Behind Chiplets for GPUs". TechPowerUp. November 14, 2022. Retrieved April 8, 2023.
  11. ^ Klotz, Aaron (January 29, 2023). "AMD GPU Appears to Leave Room for Future 3D V-Cache". Tom's Hardware. Retrieved April 8, 2023.
  12. ^ Ridley, Jacob (January 30, 2023). "Tiny spots on AMD's RDNA 3 GPU hint at massive cache potential". PC Gamer. Retrieved April 8, 2023.
  13. ^ a b Walton, Jarred (November 14, 2022). "AMD RDNA 3 GPU Architecture Deep Dive: The Ryzen Moment for GPUs". Tom's Hardware. Retrieved April 8, 2023.
  14. ^ a b Gula, Damien (November 3, 2022). "AMD's RDNA 3 GPUs are Way Cheaper Than the RTX 4090". Gizmodo. Retrieved April 8, 2023.
  15. ^ Vasishta, Aaryaman (January 10, 2023). "How to accelerate AI applications on RDNA 3 using WMMA". GPUOpen. Archived from the original on January 10, 2023. Retrieved August 14, 2023.
  16. ^ Olšan, Jan (November 7, 2022). "AMD RDNA 3 details: architecture changes, AI acceleration, DP 2.1". HWCooling. Retrieved April 8, 2023.
  17. ^ a b "Microbenchmarking AMD's RDNA 3 Graphics Architecture". Chips and Cheese. January 7, 2023. Retrieved April 29, 2024.
  18. ^ Shilov, Anton (May 4, 2022). "First Details About AMD's Next Generation Video Engine Revealed". Tom's Hardware. Retrieved April 10, 2023.
  19. ^ Klotz, Aaron (December 12, 2022). "AMD's Radeon RX 7900 AV1 encoder is almost on par with Intel Arc and Nvidia's RTX 40 series". TechSpot. Retrieved April 8, 2023.
  20. ^ Taylor, Adam (December 14, 2022). "Tested: With RDNA 3, AMD Radeon is finally useful for content creators". PCWorld. Retrieved April 8, 2023.
  21. ^ Sag, Anshel (November 14, 2022). "AMD's New Radeon RX 7900XTX And 7900XT Put The Pressure On NVIDIA". Forbes. Retrieved April 8, 2023.
  22. ^ "AMD Unveils World's Most Advanced Gaming Graphics Cards, Built on Groundbreaking AMD RDNA 3 Architecture with Chiplet Design". AMD (Press release). April 21, 2023.
  23. ^ "AMD Radeon RX 7600 Specs". TechPowerUp. Retrieved May 24, 2023.
  24. ^ "AMD Radeon RX 7600 XT Specs". TechPowerUp. Retrieved January 8, 2024.
  25. ^ Mujtaba, Hassan (January 8, 2024). "AMD Radeon RX 7600 XT 16 GB GPU Introduced: Faster 2048 Core RDNA 3 Chip, Double The VRAM of RTX 4060 At $329". Wccftech. Retrieved January 8, 2024.
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