Martin Ding Fat Wong is an American and Chinese computer scientist, electrical engineer, and university administrator. He is the Provost of the Hong Kong Baptist University (HKBU).[1] Wong is known for his contributions to computer-aided design of integrated circuits.

University career edit

Wong received his Ph.D. degree in Computer Science from University of Illinois at Urbana-Champaign (UIUC) in 1987 advised by Chung Laung Liu.[2] Between 1987 and 2002, he was a Bruton Centennial Professor of Computer Science at the University of Texas at Austin. He returned to UIUC in 2002 as the Edward C. Jordan Professor of Electrical and Computer Engineering.[3] In 2012, he became the Executive Associate Dean of the College of Engineering. In 2018, he moved to the Chinese University of Hong Kong (CUHK), where he became the Choh-Ming Li Professor of Computer Science and Engineering and the Dean of the Faculty of Engineering.[4] In 2023, Wong became the Provost of Hong Kong Baptist University (HKBU) and a Chair Professor of Computer Science there.[1] He has published over 450 scholarly papers and graduated 51 Ph.D. students in EDA[4]

Technical contributions edit

Many of Wong's technical contributions are in algorithms for physical design of integrated circuits. He developed the use of simulated annealing in floorplan (microelectronics) design[5][6] as well as algorithms for wire routing[7] and circuit partitioning.[8] Wong also worked on FPGA design and efficient GPU implementations of classical algorithms, such as breadth-first search.[9]

Awards edit

Wong was named an IEEE Fellow in 2006 "for contributions to algorithmic aspects of computer-aided design (CAD) of very large scale integrated (VLSI) circuits and systems."[10] He was named an ACM Fellow in 2017 "for contributions to the algorithmic aspects of electronic design automation (EDA)".[11]

In 2000, Wong shared a IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Donald O. Pederson Best Paper Award[12] for the paper on simultaneous buffer insertion and sizing and wire sizing.[13]

References edit

  1. ^ a b "Professor Martin Wong". Hong Kong Baptist University. August 2023.
  2. ^ "Martin D.F. Wong". Mathematics genealogy project. Retrieved September 6, 2023.
  3. ^ "Martin D.F. Wong". UIUC Department of Electrical and Computer Engineering. Retrieved September 6, 2023.
  4. ^ a b "Prof. Martin D.F. Wong". Chinese University of Hong Kong. 2022.
  5. ^ D. F. Wong; C. L. Liu (1986). "A new algorithm for floorplan design". Design Automation Conference. 1986: 101–107.
  6. ^ Xiaoping Tang; D. F. Wong (2001). "FAST-SP: a fast algorithm for block placement based on sequence pair". Asp-Dac. 2001: 521–526.
  7. ^ Shinichiro Haruyama; Martin D. F. Wong; Donald S. Fussell (1988). "Topological channel routing". ICCAD. 1988: 406–409.
  8. ^ Honghua Yang; D. F. Wong (1994). "Efficient network flow based min-cut balanced partitioning". ICCAD. 1994: 50–55.
  9. ^ Lijuan Luo; Martin D. F. Wong; Wen-mei Hwu (2010). "An effective GPU implementation of breadth-first search". Design Automation Conference. 2010: 52–55.
  10. ^ "IEEE Fellows Directory".
  11. ^ "Wong honored as ACM Fellow for electronic design automation contributions". UIUC. December 21, 2017.
  12. ^ "IEEE Transactions on Computer-Aided Design Donald O. Pederson Best Paper Award". IEEE CEDA. Retrieved September 6, 2023.
  13. ^ Chu, Chris; Wong, Martin D.F. (June 1999). "A Quadratic Programming Approach to Simultaneous Buffer Insertion/Sizing and Wire Sizing". IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 18 (6): 787–798. doi:10.1109/43.766728.

External links edit