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The Puma Family 16h is a low-power microarchitecture by AMD for its APUs. It succeeds the Jaguar as a second-generation version, targets the same market, and belongs to the same AMD architecture Family 16h. The Beema line of processors are aimed at low-power notebooks, and Mullins are targeting the tablet sector.

Puma - Family 16h (2nd-gen)
ProducedFrom mid-2014 to present
Common manufacturer(s)
Max. CPU clock rate1.35 GHz to 2.5 GHz
Min. feature size28 nm
Instruction setAMD64 (x86-64)
Cores2–4
Core name(s)
  • Beema
  • Mullins
L1 cache64 KB per core[1]
L2 cache1 MB to 2 MB shared
Socket(s)
PredecessorJaguar - Family 16h
GPURadeon Rx: 128 cores, 300–800 Mhz
Brand name(s)

Contents

DesignEdit

The Puma cores use the same microarchitecture as Jaguar, and inherits the design:

Instruction set supportEdit

Like Jaguar, the Puma core has support for the following instruction sets and instructions: MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AVX, F16C, CLMUL, AES, BMI1, MOVBE (Move Big-Endian instruction), XSAVE/XSAVEOPT, ABM (POPCNT/LZCNT), and AMD-V.[1]

Improvements over JaguarEdit

  • 19% CPU core leakage reduction at 1.2V[3]
  • 38% GPU leakage reduction
  • 500 mW reduction in memory controller power
  • 200 mW reduction in display interface power
  • Chassis temperature aware turbo boost[4]
  • Selective boosting according to application needs (intelligent boost)
  • Support for ARM TrustZone via integrated Cortex-A5 processor
  • Support for DDR3L-1866 memory[5]

Puma+Edit

AMD released a revision of Puma core, Puma+, as a part of the Carrizo-L platform in 2015. The differences in the CPU microarchitecture are unclear. Puma+ featured 2 or 4 cores up to 2.5GHz and required the newer FP4 socket.[6]

Features and ASICsEdit

Brand Llano Trinity Richland Kaveri Carrizo Bristol Ridge Raven Ridge Picasso Desna, Ontario, Zacate Kabini, Temash Beema, Mullins Carrizo-L Stoney Ridge
Platform Desktop, mobile Ultra-mobile
Released Aug 2011 Oct 2012 Jun 2013 Jan 2014 Jun 2015 Jun 2016 Oct 2017 Jan 2019 Jan 2011 May 2013 Q2 2014 May 2015 June 2016
CPU microarchitecture K10 Piledriver Steamroller Excavator Zen Zen+ Bobcat Jaguar Puma Puma+[7] Excavator
GPU microarchitecture TeraScale 2 (VLIW5) TeraScale 3 (VLIW4) GCN 2nd gen GCN 3rd gen GCN 5th gen[8] TeraScale 2 (VLIW5) GCN 2nd gen GCN 3rd gen[8]
Instruction set TeraScale instruction set GCN instruction set TeraScale instruction set GCN instruction set
Fab. (nm) GlobalFoundries 32 SOI GlobalFoundries 28 SHP GlobalFoundries 14LPP GlobalFoundries 12LP TSMC 40 28
die area (mm2) 228 246 245 245 250 210[9] 210 75 (+ 28 FCH) ~107 ? 125
Socket FM1, FS1 FM2, FS1+, FP2 FM2+, FP3 FM2+[a], FP4 AM4, FP4 AM4, FP5 FT1 AM1, FT3 FT3b FP4
Memory support DDR3 DDR4 DDR3L DDR4
3D engine[b] Up to 400:20:8 Up to 384:24:6 Up to 512:32:8 Up to 704:44:16[10] Up to 704:44:16 80:8:4 128:8:4 Up to 192:?:?
IOMMUv1 IOMMUv2 IOMMUv1 ?
Video decoder UVD 3.0 UVD 4.2 UVD 6.0 VCN 1.0[11] UVD 3.0 UVD 4.0 UVD 4.2 UVD 6.0 UVD 6.3
Video encoder N/A VCE 1.0 VCE 2.0 VCE 3.1 N/A VCE 2.0 VCE 3.1
GPU power saving PowerPlay PowerTune N/A PowerTune[12]
TrueAudio N/A  [13] N/A ?
FreeSync N/A 1
2
N/A ?
HDCP[c] ? 1.4 1.4
2.2
? 1.4
Supported displays[d] 2–3 2–4 3 4 ? 2 ?
/drm/radeon[e][15][16]   N/A   N/A
/drm/amdgpu[e][17] N/A  [18]   N/A  [18]  
  1. ^ APU models: A8-7680, A6-7480. CPU only: Athlon X4 845.
  2. ^ Unified shaders : texture mapping units : render output units
  3. ^ To play protected video content, it also requires card, operating system, driver, and application support. A compatible HDCP display is also needed for this. HDCP is mandatory for the output of certain audio formats, placing additional constraints on the multimedia setup.
  4. ^ To feed more than two displays, the additional panels must have native DisplayPort support.[14] Alternatively active DisplayPort-to-DVI/HDMI/VGA adapters can be employed.
  5. ^ a b DRM (Direct Rendering Manager) is a component of the Linux kernel. Support in this table refers to the most current version.

ProcessorsEdit

Desktop/Mobile (Beema)Edit

Family Model Socket CPU GPU TDP Memory
Cores Frequency Max. Turbo L2 Cache Model Config. Max. Freq.
A8 6410 Socket FT3b 4 2.00 GHz 2.4 GHz 2 MB Radeon R5 128:?:? 800 MHz 15 W DDR3L-1866
A6 6310 1.80 GHz Radeon R4 800 MHz
A4 6250J 2.00 GHz N/A Radeon R3 600 MHz 25 W DDR3L-1600
A4 6210 1.80 GHz Radeon R3 600 MHz 15 W
E2 6110 1.50 GHz Radeon R2 500 MHz
E1 6010 2 1.35 GHz 1 MB 350 MHz 10 W DDR3L-1333

Tablet (Mullins)Edit

Family Model CPU GPU Power Memory
Cores Frequency Max. Turbo L2 Cache Model Config. Max. Freq. TDP SDP
A10 Micro 6700T 4 1.2 GHz 2.2 GHz 2 MB Radeon R6 128:?:? 500 MHz 4.5 W 2.8 W DDR3L-1333
A6 Micro 6500T 1.8 GHz Radeon R4 401 MHz
A4 Micro 6400T 1.0 GHz 1.6 GHz Radeon R3 350 MHz
E1 Micro 6200T 2 1.4 GHz 1 MB Radeon R2 300 MHz 3.95 W DDR3L-1066

ReferencesEdit

  1. ^ a b "Software Optimization Guide for Family 16h Processors". AMD. Retrieved August 3, 2013.
  2. ^ "AMD launches new Beema, Mullins SoCs". ExtremeTech. 2014-04-29. Retrieved 2014-05-02.
  3. ^ Shimpi, Anand. "AMD Beema/Mullins Architecture & Performance Preview". AnandTech. Retrieved 29 April 2014.
  4. ^ Shimpi, Anand. "New Turbo Boost, The Lineup and Trustzone". AnandTech. Retrieved 29 April 2014.
  5. ^ Woligroski, Don. "Meet The Mullins And Beema Tablet APUs". Toms Hardware. Retrieved 29 April 2014.
  6. ^ Cutress, Ian (12 May 2015). "AMD's Carrizo-L APU Unveiled". Anandtech. Retrieved 14 January 2017.
  7. ^ "AMD Mobile "Carrizo" Family of APUs Designed to Deliver Significant Leap in Performance, Energy Efficiency in 2015" (Press release). 20 November 2014. Retrieved 16 February 2015.
  8. ^ a b "AMD VEGA10 and VEGA11 GPUs spotted in OpenCL driver". VideoCardz.com. Retrieved 6 June 2017.
  9. ^ "The Mobile CPU Comparison Guide Rev. 13.0 Page 5 : AMD Mobile CPU Full List". TechARP.com. Retrieved 13 December 2017.
  10. ^ Cutress, Ian (1 February 2018). "Zen Cores and Vega: Ryzen APUs for AM4 – AMD Tech Day at CES: 2018 Roadmap Revealed, with Ryzen APUs, Zen+ on 12nm, Vega on 7nm". Anandtech. Retrieved 7 February 2018.
  11. ^ Larabel, Michael (17 November 2017). "Radeon VCN Encode Support Lands in Mesa 17.4 Git". Phoronix. Retrieved 20 November 2017.
  12. ^ Tony Chen; Jason Greaves, "AMD's Graphics Core Next (GCN) Architecture" (PDF), AMD, retrieved 13 August 2016
  13. ^ "A technical look at AMD's Kaveri architecture". Semi Accurate. Retrieved 6 July 2014.
  14. ^ "How do I connect three or More Monitors to an AMD Radeon™ HD 5000, HD 6000, and HD 7000 Series Graphics Card?". AMD. Retrieved 8 December 2014.
  15. ^ Airlie, David (26 November 2009). "DisplayPort supported by KMS driver mainlined into Linux kernel 2.6.33". Retrieved 16 January 2016.
  16. ^ "Radeon feature matrix". freedesktop.org. Retrieved 10 January 2016.
  17. ^ Deucher, Alexander (16 September 2015). "XDC2015: AMDGPU" (PDF). Retrieved 16 January 2016.
  18. ^ a b Michel Dänzer (17 November 2016). "[ANNOUNCE] xf86-video-amdgpu 1.2.0". lists.x.org.

External linksEdit