Nvidia NVENC is a feature in its graphics cards that performs video encoding, offloading this compute-intensive task from the CPU. It was introduced with the Kepler-based GeForce 600 series in March 2012.
The encoder is supported in many streaming and recording programs, such as Wirecast, Open Broadcaster Software (OBS) and Bandicam, and also works with Share game capture, which is included in Nvidia's GeForce Experience software.
Consumer targeted GeForce graphics cards officially support no more than 2 simultaneously encoding video streams, regardless of the count of the cards installed, but this restriction can be circumvented on Linux and Windows systems by applying an unofficial patch to the drivers. Professional cards support between 2 and 21 simultaneous streams per card, depending on card model and compression quality.
NVENC has undergone several hardware revisions since its introduction with the first Kepler GPU (GK104).
First generation, Kepler GK1xxEdit
NVidia's documentation states a peak encoder throughput of 8× realtime at a resolution of 1920×1080 (where the baseline "1×" equals 30 Hz). Actual throughput varies on the selected preset, user-controlled parameters and settings, and the GPU/memory clock frequencies. The published 8× rating is achievable with the NVENC high-performance preset, which sacrifices compression efficiency and quality for encoder throughput. The high-quality preset is considerably slower but produces fewer compression artifacts.
Second generation, Maxwell GM107Edit
Introduced with the first-generation Maxwell architecture, second generation NVENC adds support for the high-performance HP444 profile (YUV4:4:4, predictive lossless encoding), and increases encoder throughput up to 16× realtime, which corresponds to about 1080p @ 480 Hz with the high-performance preset.)
Maxwell GM108 does not have NVENC hardware encoder support.
Third generation, Maxwell GM20xEdit
Introduced with the second-generation Maxwell architecture, third generation NVENC implements the video compression algorithm High Efficiency Video Coding (a.k.a. HEVC, H.265) and also increases the H.264 encoder's throughput to cover 4K-resolution at 60 Hz (2160p60). However, it does not support B-frames for HEVC encoding (just I and P frames). The maximum NVENC HEVC coding tree unit (CU) size is 32 (the HEVC standard allows a maximum of 64), and its minimum CU size is 8.
HEVC encoding also lacks Sample Adaptive Offset (SAO). Adaptive quantization, look-ahead rate control, adaptive B-frames (H.264 only) and adaptive GOP features were added with the release of Nvidia Video Codec SDK 7.  These features rely on CUDA cores for hardware acceleration.
SDK 7 supports two forms of adaptive quantization; Spatial AQ (H.264 and HEVC) and Temporal AQ (H.264 only).
Nvidia's consumer-grade (GeForce) cards are restricted to two simultaneous encoding jobs. Their professional Quadro cards do not have this restriction.
Fourth generation, Pascal GP10xEdit
Fourth generation NVENC implements HEVC Main10 10-bit hardware encoding. It also doubles the encoding performance of 4K H.264 & HEVC when compared to previous generation NVENC. It supports HEVC 8K, 4:4:4 chroma subsampling, lossless encoding, and sample adaptive offset (SAO).
Nvidia Video Codec SDK 8 added Pascal exclusive Weighted Prediction feature (CUDA based). Weighted prediction is not supported if the encode session is configured with B frames (H.264).
There is no B-Frame support for HEVC encoding, and the maximum CU size is 32×32.
The NVIDIA GT 1030 and the Mobile Quadro P500 are GP108 chips that don't support the NVENC encoder. 
Fifth generation, Volta GV10x/Turing TU117Edit
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Sixth generation, Turing TU10x/TU116Edit
Sixth generation NVENC implements HEVC 8K encoding at 30FPS, HEVC B-Frames support and provides up to 25% bitrate savings for HEVC and up to 15% bitrate savings for H.264. The Nvidia GeForce GTX 1650 is exempt from this generation however, as it uses Volta NVENC instead of Turing.
Operating system supportEdit
The Nvidia NVENC SIP core needs to be supported by the device driver. The driver provides one or more interfaces, (e.g. OpenMAX IL) to NVENC. The NVENC SIP core can only be accessed through the proprietary NVENC API (as opposed to the open-source VDPAU API).
It is bundled with Nvidia's GeForce driver.
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