Non-volatile random-access memory
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Non-volatile random-access memory (NVRAM) is random-access memory that is non-volatile. This is in contrast to dynamic random-access memory (DRAM) and static random-access memory (SRAM), which both maintain data only for as long as power is applied.
Currently, the best-known form of both NV-RAM and EEPROM memory is flash memory. Some drawbacks to flash memory include the requirement to write it in larger blocks than many computers can automatically address, and the relatively limited longevity of flash memory due to its finite number of write-erase cycles (as of January 2010 most consumer flash products can withstand only around 100,000 rewrites before memory begins to deteriorate). Another drawback is the performance limitations preventing flash from matching the response times and, in some cases, the random addressability offered by traditional forms of RAM. Several newer technologies are attempting to replace flash in certain roles, and some even claim to be a truly universal memory, offering the performance of the best SRAM devices with the non-volatility of flash. As of June 2018 these alternatives have not yet become mainstream.
Early computers used core and drum memory systems which were non-volatile as a byproduct of their construction. The most common form of memory through the 1960s was magnetic-core memory, which stored data in the polarity of small magnets. Since the magnets held their state even with the power removed, core memory was also non-volatile. Other memory types required constant power to retain data, such as vacuum tube or solid-state flip-flops, Williams tubes, and semiconductor memory (static or dynamic RAM).
Advances in semiconductor fabrication in the 1970s led to a new generation of solid state memories that magnetic-core memory could not match on cost or density. Today dynamic RAM forms the vast majority of a typical computer's main memory. Many systems require at least some non-volatile memory. Desktop computers require permanent storage of the instructions required to load the operating system. Embedded systems, such as an engine control computer for a car, must retain their instructions when power is removed. Many systems used a combination of RAM and some form of ROM for these roles.
Custom ROM integrated circuits were one solution. The memory contents were stored as a pattern of the last mask used for manufacturing the integrated circuit, and so could not be modified once completed.
PROM improved on this design, allowing the chip to be written electrically by the end-user. PROM consists of a series of diodes that are initially all set to a single value, "1" for instance. By applying higher power than normal, a selected diode can be "burned out" (like a fuse), thereby permanently setting that bit to "0". PROM facilitated prototyping and small volume manufacturing. Many semiconductor manufacturers provided a PROM version of their mask ROM part, so that development firmware could be tested before ordering a mask ROM.
Those who required real RAM-like performance and non-volatility typically have had to use conventional RAM devices and a battery backup. For example, IBM PC's and successors beginning with the IBM PC AT used nonvolatile BIOS memory, often called CMOS RAM or parameter RAM, and this was a common solution in other early microcomputer systems like the original Apple Macintosh, which used a small amount of memory powered by a battery for storing basic setup information like the selected boot volume. (The original IBM PC and PC XT instead used DIP switches to represent up to 24 bits of system configuration data; DIP or similar switches are another, primitive type of programmable ROM device that was widely used in the 1970s and 1980s for very small amounts of data—typically no more than 8 bytes.) Before industry standardization on the IBM PC architecture, some other microcomputer models used battery-backed RAM more extensively: for example, in the TRS-80 Model 100/Tandy 102, all of the main memory (8 KB minimum, 32 KB maximum) is battery-backed SRAM. Also, in the 1990s many video game software cartridges (e.g. for consoles such as the Sega Genesis) included battery-backed RAM to retain saved games, high scores, and similar data. Also, some arcade video game cabinets contain CPU modules that include battery-backed RAM containing keys for on-the-fly game software decryption. Much larger battery backed memories are still used today as caches for high-speed databases that require a performance level newer NVRAM devices have not yet managed to meet.
A huge advance in NVRAM technology was the introduction of the floating-gate MOSFET transistor, which led to the introduction of erasable programmable read-only memory, or EPROM. EPROM consists of a grid of transistors whose gate terminal (the "switch") is protected by a high-quality insulator. By "pushing" electrons onto the base with the application of higher-than-normal voltage, the electrons become trapped on the far side of the insulator, thereby permanently switching the transistor "on" ("1"). EPROM can be re-set to the "base state" (all "1"s or "0"s, depending on the design) by applying ultraviolet light (UV). The UV photons have enough energy to push the electrons through the insulator and return the base to a ground state. At that point the EPROM can be re-written from scratch.
An improvement on EPROM, EEPROM, soon followed. The extra "E" stands for electrically, referring to the ability to reset EEPROM using electricity instead of UV, making the devices much easier to use in practice. The bits are re-set with the application of even higher power through the other terminals of the transistor (source and drain). This high power pulse, in effect, sucks the electrons through the insulator, returning it to the ground state. This process has the disadvantage of mechanically degrading the chip, however, so memory systems based on floating-gate transistors in general have short write-lifetimes, on the order of 105 writes to any particular bit.
One approach to overcoming the rewrite count limitation is to have a standard SRAM where each bit is backed up by an EEPROM bit. In normal operation the chip functions as a fast SRAM and in case of power failure the content is quickly transferred to the EEPROM part, from where it gets loaded back at the next power up. Such chips were called NOVRAMs by their manufacturers.
The basis of flash memory is identical to EEPROM, and differs largely in internal layout. Flash allows its memory to be written only in blocks, which greatly simplifies the internal wiring and allows for higher densities. Memory storage density is the main determinant of cost in most computer memory systems, and due to this flash has evolved into one of the lowest cost solid-state memory devices available. Starting around 2000, demand for ever-greater quantities of flash have driven manufacturers to use only the latest fabrication systems in order to increase density as much as possible. Although fabrication limits are starting to come into play, new "multi-bit" techniques appear to be able to double or quadruple the density even at existing linewidths.
Flash and EEPROM's limited write-cycles are a serious problem for any real RAM-like role, however. In addition, the high power needed to write the cells is a problem in low-power roles, where NVRAM is often used. The power also needs time to be "built up" in a device known as a charge pump, which makes writing dramatically slower than reading, often as much as 1,000 times. A number of new memory devices have been proposed to address these shortcomings.
To date, the only such system to enter widespread production is ferroelectric RAM, or F-RAM (sometimes referred to as FeRAM). F-RAM is a random-access memory similar in construction to DRAM but (instead of a dielectric layer like in DRAM) contains a thin ferroelectric film of lead zirconate titanate [Pb(Zr,Ti)O3], commonly referred to as PZT. The Zr/Ti atoms in the PZT change polarity in an electric field, thereby producing a binary switch. Unlike RAM devices, F-RAM retains its data memory when power is shut off or interrupted, due to the PZT crystal maintaining polarity. Due to this crystal structure and how it is influenced, F-RAM offers distinct properties from other nonvolatile memory options, including extremely high endurance (exceeding 1016 access cycles for 3.3 V devices), ultra low power consumption (since F-RAM does not require a charge pump like other non-volatile memories), single-cycle write speeds, and gamma radiation tolerance. Ramtron International has developed, produced, and licensed ferroelectric RAM (F-RAM), and other companies that have licensed and produced F-RAM technology include Texas Instruments, Rohm, and Fujitsu.
Another approach to see major development effort is magnetoresistive random-access memory, or MRAM, which uses magnetic elements and in general operates in a fashion similar to core, at least for the first-generation technology. Only one MRAM chip has entered production to date: Everspin Technologies' 4 Mbit part, which is a first-generation MRAM that utilizes cross-point field induced writing. Two second-generation techniques are currently in development: Thermal Assisted Switching (TAS), which is being developed by Crocus Technology, and spin-transfer torque (STT) on which Crocus, Hynix, IBM, and several other companies are working. STT-MRAM appears to allow for much higher densities than those of the first generation, but is lagging behind flash for the same reasons as FeRAM – enormous competitive pressures in the flash market.
Another solid-state technology to see more than purely experimental development is Phase-change RAM, or PRAM. PRAM is based on the same storage mechanism as writable CDs and DVDs, but reads them based on their changes in electrical resistance rather than changes in their optical properties. Considered a "dark horse" for some time, in 2006 Samsung announced the availability of a 512 Mbit part, considerably higher capacity than either MRAM or FeRAM. The areal density of these parts appears to be even higher than modern flash devices, the lower overall storage being due to the lack of multi-bit encoding. This announcement was followed by one from Intel and STMicroelectronics, who demonstrated their own PRAM devices at the 2006 Intel Developer Forum in October.
Perhaps one of the more innovative solutions is millipede memory, developed by IBM. Millipede is in essence a punched card rendered using nanotechnology in order to dramatically increase areal density. Although it was planned to introduce Millipede as early as 2003, unexpected problems in development delayed this until 2005, by which point it was no longer competitive with flash. In theory the technology offers storage densities on the order of 1 Tbit/in² (10 Tbit/cm²), greater than even the best hard drive technologies currently in use (perpendicular recording offers 636 Gbit/in² (4.1 Tbit/cm²) as of Dec. 2011), but future heat-assisted magnetic recording and patterned media together could support densities of 10 Tbit/in² (almost 100 Tbit/cm²). However, slow read and write times for memories this large seem to limit this technology to hard drive replacements as opposed to high-speed RAM-like uses, although to a very large degree the same is true of flash as well.
An alternative application of (hafnium oxide based) ferroelectrics is Fe FET based memory, which utilises a ferroelectric between the gate and device of a field-effect transistor. Such devices are claimed to have the advantage that the utilise the same technology as HKMG (high-L metal gate) based lithography, and scale to the same size as a conventional FET at a given process node. As of 2017 32Mbit devices have been demonstrated at 22 nm.
A number of more esoteric devices have been proposed, including Nano-RAM based on carbon nanotube technology, but these are currently far from commercialization. The advantages that nanostructures such as quantum dots, carbon nanotubes and nanowires offer over their silicon-based predecessors include their tiny size, speed and their density. Several concepts of molecular-scale memory devices have been developed recently. Research has also been done in designing racetrack memory, also called domain wall memory. Also seeing renewed interest is silicon-oxide-nitride-oxide-silicon (SONOS) memory.
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