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HECToR (High End Computing Terascale Resource) was a British academic national supercomputer service funded by EPSRC, Natural Environment Research Council (NERC) and BBSRC for the UK academic community. The HECToR service was run by partners including EPCC, Science and Technology Facilities Council (STFC) and Numerical Algorithms Group (NAG).
|Active||October 2007 - March 2014|
|Sponsors||EPSRC, NERC and BBSRC|
|Operators||Partners including EPCC, STFC and NAG)|
|Location||University of Edinburgh, Scotland, United Kingdom|
|Architecture||Cray XE6, 90,112 cores|
|Operating system||Cray Linux Environment|
|Purpose||UK academic community use|
The supercomputer itself (currently a Cray XE6) was located at the University of Edinburgh in Scotland. The first phase came on line in October 2007, and, by the time it was decommissioned, it had been upgraded to Phase 3 configuration, with a peak performance of over 800 teraflops. Its successor is called ARCHER.
HECToR's hardware configuration has been progressively upgraded since the system was first commissioned.
HECToR's initial configuration, known as Phase 1, featured 60 Cray XT4 cabinets containing 1416 compute blades, giving a total of 11,328 2.8 GHz AMD Opteron processor cores, connected to 576 terabytes of RAID backing storage, later increased to 934 TB. The peak performance of the system was 59 teraflops.
In August 2008, 28 Cray X2 Black Widow vector compute nodes were added to the system. Each node had 4 vector processors, giving a total of 112 processors. Each processor was capable of 25.6 gigaflops, giving a peak performance of 2.87 teraflops. Each 4-processor node shared 32 gigabytes of memory.
In the summer of 2009, the XT4 cabinets were upgraded with quad-core 2.3 GHz Opteron processors with 8 GB memory each. This doubled the number of processor cores to 22,656, and increased total system memory to 45.3 terabytes. Peak performance was increased to 208 teraflops.
The Phase 2b upgrade, performed in 2010, involved installation of a new 20-cabinet Cray XT6 system featuring 12-core Opteron 6100 processors, giving a total of 44,544 cores and a peak performance of over 360 teraflops. At the same time the existing XT4 system was reduced to approximately half its original size. A further upgrade took place later in 2010 to replace the SeaStar2 interconnect with a new interconnect technology, codenamed Gemini.
The Phase 3 upgrade took place in November and December 2011. It involved extending the XT6 system to 30 cabinets containing 704 compute blades, and upgrading the processors to 16-core, 2.3 GHz Interlagos Opterons, giving a total of 90,112 cores. The operating system was also upgraded to CLE 4.0.
HECToR supports four compiler suites:
- PGI compilers (v7.1-4) - pgf90, pgf77, pgcc, pgCC.
- Pathscale compilers (v3.1) - pathf90, pathcc, pathCC.
- GNU compilers (v4.2.3) - gfortran, gcc.
- Cray compilers.
Compilation for the HECToR backend nodes is facilitated through the Cray compilation scripts: ftn, cc, and CC.
- Inside the UK's fastest machine, James Randerson, Guardian, Wed 2 January 2008
- "HECToR Hardware". www.hector.ac.uk. UoE HPCX Ltd. Retrieved 7 May 2010.
- "HECToR Phase 1 Hardware Configuration". www.hector.ac.uk. UoE HPCX Ltd. Retrieved 7 May 2010.
- "HECToR Phase2B Upgrade". HECToRNews. UoE HPCX Ltd. (7). December 2009.
- "HECToR Phase 3 Upgrade". www.hector.ac.uk. UoE HPCX Ltd. 18 October 2011. Retrieved 28 February 2012.