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HC-256 is a stream cipher designed to provide bulk encryption in software at high speeds while permitting strong confidence in its security.[1] A 128-bit variant was submitted as an eSTREAM cipher candidate and has been selected as one of the four final contestants in the software profile.[2][3]

The algorithm is designed by Hongjun Wu, and was first published in 2004. It is not patented.



HC-256 has a 256 bit key and an initialization vector (nonce) of 256 bits.[1]

Internally, it consists of two secret tables (P and Q). Each table contains 1024 32-bit words. For each state update one 32-bit word in each table is updated using a non-linear update function. After 2048 steps all elements of the tables have been updated.

It generates one 32-bit word for each update step using a 32-bit to 32-bit mapping function similar to the output function of the Blowfish cipher. Finally a linear bit-masking function is applied to generate an output word. It uses the two message schedule functions in the hash function SHA-256 internally, but with the tables P and Q as S-boxes.

HC-128 is similar in function, and reduces each of key length, nonce, number of words in the tables P and Q, and number of table updating steps by half.[2]


The performance of HC-256 is estimated by its author to be about 4 cycles per byte on a Pentium 4 processor. However the initialization phase of the cipher includes expanding the 256-bit key into the tables P, Q and then running the cipher for 4096 steps. The author of HC-256 estimates this process to take around 74,000 cycles.

For HC-128 an encryption speed of about 3 cycles per byte on a Pentium M processor are cited.

The implementation of HC-128 on various computing structures is studied in detail, with significant performance gains compared to naive SW implementation.[4][5]


  1. ^ a b Wu, Hongjun (2004). "A New Stream Cipher HC-256" (PDF). Fast Software Encryption – FSE 2004, LNCS 3017: 226–244. 
  2. ^ a b Wu, Hongjun (2004). "The Stream Cipher HC-128" (PDF). 
  3. ^ "The eSTREAM Project". 
  4. ^ Chattopadhyay, Anupam; Ayesha Khalid; Subhamoy Maitra; Shashwat Raizada (May 2012). "Designing High-Throughput Hardware Accelerator for Stream Cipher HC-128". IEEE ISCAS. 
  5. ^ Khalid, Ayesha; Deblin Bagchi; Goutam Paul; Anupam Chattopadhyay (Nov 2012). "Optimized GPU Implementation and Performance Analysis of HC Series of Stream Ciphers". 15th Annual International Conference on Information Security and Cryptology (ICISC). 

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