The ARM Cortex-A73 is a microarchitecture implementing the ARMv8-A 64-bit instruction set designed by ARM Holdings' Sophia design centre. The Cortex-A73 is a 2-wide decode out-of-order superscalar pipeline.
|Designed by||ARM Holdings|
|Max. CPU clock rate||to 2.8 GHz|
|L1 cache||96–128 KiB (64 KiB I-cache with parity, 32–64 KiB D-cache) per core|
|L2 cache||1–8 MiB|
|Architecture and classification|
|Products, models, variants|
|Product code name(s)|
The Cortex-A73 serves as the successor of the Cortex-A72, designed to offer 30% greater performance or 30% increased power efficiency. The design of the Cortex-A73 is based on the 32-bit ARMv7-A Cortex-A17, emphasizing power efficiency and sustained peak performance. The Cortex-A73 is primarily targeted at mobile computing. In reviews, the Cortex-A73 showed improved integer instructions per clock (IPC), though lower floating point IPC, relative to the Cortex-A72.
The Cortex-A73 is available as SIP core to licensees, and its design makes it suitable for integration with other SIP cores (e.g. GPU, display controller, DSP, image processor, etc.) into one die constituting a system on a chip (SoC).
The Cortex-A73 is also the first ARM core to be modified through ARM's semi-custom 'Built on ARM' license. The Kryo 280 was the first released semi-custom product, though the modifications made relative to the stock Cortex-A73 were not announced.
The Kryo 280, released in March 2017 by Qualcomm in the Snapdragon 835, uses a modified Cortex-A73 core. The SoC utilizes 8 Kryo 280 cores in a big.LITTLE arrangement as two 4-core blocks, clocked at 2.456 GHz and 1.906 GHz. The modifications made by Qualcomm relative to the stock Cortex-A73 core are unknown, and the resulting Kryo 280 core demonstrated increased integer IPC. The Kryo 260 also used Cortex-A73 cores, though at lower clock speeds than the Kryo 280 and in combination with Cortex-A53 cores.
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