|Headquarters||Santa Clara, California|
|Key people||Dennis Segers (CEO), Steve Teig (CTO)|
Tabula is a fabless semiconductor company based in Santa Clara, California. Founded in 2003 by Steve Teig (ex-CTO of Cadence), it has raised $215 million in venture funding. The company ranked third on the Wall Street Journal's annual "Next Big Thing" list in 2012.
ABAX is a family of FPGA chips (marketed as 3D Programmable Logic Devices or 3PLD), developed by Tabula. They have 220-630 thousands of 4-input LUT from user point of view and capable of working at 1,6 GHz physical clock speed. They also contain up to 1280 DSP blocks with 18x18 multipliers with pre-adder; up to 920 GPIO pins and 48 SerDes channels (up to 6.5 Gbps). ABAX are produced using 40 nm TSMC process and packaged in flip-chip packages with 1936 or 1156 pins. Internally ABAX chips use high-frequency (1,6 GHz) reconfiguration between up to 8 config states, named folds, to emulate a high number of FPGA-resources. If all 8 folds are used to get maximum LUT capacity, user visible clock speed will be 200 MHz; for 4 folds capacity is halved but frequency is doubled and so on. Volume price of ABAX chips was planned in 2012 to be in the range of 100-200 USD.
There are also some network solutions by Tabula, like 100 or 40 Gb Ethernet to Interlaken bridges; high-speed packet search engines and multiport 10 gigabit ethernet processors (can be used as switch, router, or programmable NIC).
Spacetime is a product of Tabula, that goes beyond the abilites of FPGAs. It represents two spatial dimensions and one time dimension as a unified 3D framework: a powerful simplification that has enabled Tabula to deliver in production a new category of programmable devices (“3PLDs”) that are far denser, faster, and more capable than FPGAs yet still accompanied by software that automatically maps traditional RTL onto these exotic fabrics.
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- Cromwell Schubarth (26 September 2012). "Here's 30 Bay Area startups pegged as 'Next Big Thing'". Business Journal. Retrieved 1 October 2012.
- Tom R. Halfhill (2010-03-29). "Tabula's Time Machine. Rapidly reconfigurable chips will challenge conventional FPGAs". Microprocessor Report #3 2010. Text "http://www.tabula.com/news/M11_Tabula_Reprint.pdf" ignored (help);
- Don Clark (2012-02-20). "Startup Tabula Turns to Intel As Manufacturing Partner". WSJ Blogs.
- Clive Maxfield (2012-02-21). "Tabula’s next-gen FPGAs to use Intel’s 22nm process featuring 3-D tri-gate transistors". EETimes.
- "UT ECE Colloquia". 2013-05-02.