TILE-Gx was a VLIW ISA multicore processor family designed by Tilera. It consisted of a mesh network[7] that was expected to scale up to 100 cores,[8] but only 72-core variants actually shipped.[9]
| General information | |
|---|---|
| Launched | 2010 |
| Discontinued | 2022 [1] |
| Designed by | Tilera |
| Common manufacturer(s) | |
| Performance | |
| Max. CPU clock rate | 1000[2] MHz to 1200 MHz |
| Architecture and classification | |
| Technology node | 40nm |
| Microarchitecture | VLIW RISC |
| Physical specifications | |
| Cores | |
After a few acquisitions, Tilera's designs ended up in the hands of Nvidia, which ended production of TILE-Gx processors in 2022.[1] In June 2018, the Linux kernel dropped support for this architecture.[10] Tile-Gx processors were used in MikroTik's CCR1000 series routers, and MikroTik continues to support this architecture out-of-tree in its RouterOS Linux distribution.
Product lineup edit
Common features of TILE-Gx processors:
- 64-bit VLIW RISC core (3-issue)
- 4 MAC/cycle with SIMD extensions
- L1 cache: 64 KB (32 KB data + 32 KB instruction) per core.
- L2 cache: 256 KB per core.
- L3 cache: Other core's L2 cache connected via mesh network.
- 1, 2, or 4 ECC 72-bit DDR3 controllers.
- Up to 24 PCIe 2.0 lanes.
- Optional built-in crypto accelerator with 40 Gbit/s encryption (small packet) and 20 Gbit/s full-duplex compression, true random number generator, RSA accelerator.
- Fabrication process: TSMC 40nm.
| Part | Core Frequency (GHz) |
Memory Speed | PCIe Controllers/Lanes |
DDR3 Controllers |
Network Interfaces XAUI (10Gb)/SGMII (1Gb) |
TDP | Crypto Engines |
|---|---|---|---|---|---|---|---|
| TILE-Gx8009 | 3/10 | 1 | 2/12 | ||||
| TLR4-00980CG-10C | 1.0 | 1333 MT/s | 9 W | 0 | |||
| TLR4-00980CG-10CE | 1.0 | 1333 MT/s | 10 W | 1 | |||
| TLR4-00980CG-12C | 1.2 | 1600 MT/s | 11 W | 0 | |||
| TLR4-00980CG-12CE | 1.2 | 1600 MT/s | 12 W | 1 | |||
| TILE-Gx8016 | 2/12 | 2 | 2/12 | ||||
| TLR4-01680CG-10C | 1.0 | 1600 MT/s | 15 W | 0 | |||
| TLR4-01680CG-10CE | 1.0 | 1600 MT/s | 15 W | 1 | |||
| TLR4-01680CG-12C | 1.2 | 1600 MT/s | 18 W | 0 | |||
| TLR4-01680CG-12CE | 1.2 | 1600 MT/s | 18 W | 1 | |||
| TILE-Gx8036 | 3/16 | 2 | 4/16 | ||||
| TLR4-03680CG-10C | 1.0 | 1600 MT/s | 20 W | 0 | |||
| TLR4-03680CG-10CE | 1.0 | 1600 MT/s | 22 W | 2 | |||
| TLR4-03680CG-12C | 1.2 | 1866 MT/s | 26 W | 0 | |||
| TLR4-03680CG-12CE | 1.2 | 1866 MT/s | 28 W | 2 | |||
| TILE-Gx8072 | 6/24 | 4 | 8/32 | ||||
| TLR4-07280CG-10C | 1.0 | 1600 MT/s | ? W | 0 | |||
| TLR4-07280CG-10CE | 1.0 | 1600 MT/s | ? W | 2 | |||
| TLR4-07280CG-12C | 1.2 | 1866 MT/s | ? W | 0 | |||
| TLR4-07280CG-12CE | 1.2 | 1866 MT/s | ? W | 2 | |||
See also edit
References edit
- "Tilera Corporation Joins China's Wireless TD Forum as a Senior Member" (Press release). Tilera. 26 October 2009. Archived from the original on 26 July 2011. Retrieved 16 June 2011.
- ^ a b "END OF LIFE NOTIFICATION" (PDF). Nvidia. 11 April 2022. Retrieved 21 May 2023.
- ^ a b "Tilera preps many-cored Gx chips for March launch". 30 January 2012. Retrieved 21 February 2013.
- ^ "TILE-Gx8009 datasheet" (PDF). Archived from the original (PDF) on 2013-02-01.
- ^ "TILE-Gx8016 datasheet" (PDF). Archived from the original (PDF) on 2013-02-26.
- ^ "TILE-Gx8036 datasheet" (PDF). Archived from the original (PDF) on 2013-03-22.
- ^ "TILE-Gx8072 datasheet" (PDF). Archived from the original (PDF) on 2013-08-16.
- ^ "TILE-Gx architecture shema". Archived from the original (JPG) on 2013-03-22.
- ^ "MIT's 100-core CPU Will Be Ready This Year". 24 January 2012. Retrieved 21 February 2013.
- ^ "Tilera announces 72-core Tile-Gx chip". 19 February 2013. Archived from the original on July 2, 2013. Retrieved 21 February 2013.
{{cite news}}: CS1 maint: unfit URL (link) - ^ "Linux 4.17 Spring Cleaning To Drop Some Old CPU Architectures". 17 March 2018. Retrieved 21 January 2021.
