PlayStation technical specifications

The PlayStation technical specifications describe the various components of the original PlayStation video game console.

Central processing unit (CPU) edit

LSI CoreWare CW33300-based core^[1]

MIPS R3000A-compatible 32-bit RISC CPU MIPS R3051 with 5 KB L1 cache, running at 33.8688 MHz.^[2]
The microprocessor was manufactured by LSI Logic Corp. with technology licensed from SGI.
Features:
- Initial feature size (process node) was 0.5 micron (500 nm).^[3]
- 850k – 1M transistors^{[citation needed]}
- Operating performance: 30 MIPS^[4]
- Bus bandwidth 132 MB/s^[5]
- One arithmetic/logic unit (ALU)
- One shifter
CPU cache RAM:
- 4 KB instruction cache^[2]
- 1 KB data cache configured as a scratchpad^[6]

Geometry Transformation Engine (GTE)

Coprocessor that resides inside the main CPU processor, giving it additional vector math instructions used for 3D graphics, lighting, geometry, polygon and coordinate transformations – GTE performs high-speed matrix multiplications.
Operating performance: 66 MIPS^[5]
Polygons per second (rendered in hardware):
- 90,000 with texture mapping, lighting and Gouraud shading^{[citation needed]}
- 180,000 with texture mapping^[7]
- 360,000^[8] with flat shading

Motion Decoder (MDEC)

Also residing within the main CPU, enables full screen, high quality FMV playback and is responsible for decompressing images and video into VRAM.^[4]
Operating performance: 80 MIPS^[9]
Documented device mode is to read three RLE-encoded 16×16 macroblocks, run IDCT and assemble a single 16×16 RGB macroblock.
Output data may be transferred directly to GPU via DMA.
It is possible to overwrite IDCT matrix and some additional parameters, however MDEC internal instruction set was never documented.
It is directly connected to a CPU bus.

System Control Coprocessor (Cop0)^{[citation needed]}

This unit is part of the CPU. Has 16 32-bit control registers.
Modified from the original R3000A cop0 architecture, with the addition of a few registers and functions.
Controls memory management through virtual memory technique, system interrupts, exception handling, and breakpoints.

Memory edit

2 MB main EDO DRAM^[4]
Additional RAM is integrated with the GPU (including a 1 MB framebuffer) and SPU (512 KB), see below for details.
Cache RAM for CPU core and CD-ROM. See the relevant sections for details.
Flash RAM support through the use of memory cards, see below.
BIOS stored on 512 KB ROM

Graphics processing unit (GPU) edit

32-bit Sony GPU (designed by Toshiba)^[10]

Handles display of graphics, control of framebuffer, and drawing of polygons and textures^{[citation needed]}
Handles 2D graphics processing, in a similar manner to the 3D engine^{[citation needed]}
RAM:^{[citation needed]}
- 1 MB VRAM^[4] (later models contained SGRAM) for framebuffer
- 2 KB texture cache (132 MB/s memory bus bandwidth, 32-bit wide)
- 64 bytes FIFO buffer
Features:
- Adjustable framebuffer (1024×512)
- Emulation of simultaneous backgrounds (to simulate parallax scrolling)
- Mask bit
- Texture window
- Dithering
- Clipping
- Alpha blending (4 per-texel alpha blending modes)
- Fog
- Framebuffer effects
- Transparency effects
- Render to texture
- Offscreen rendering
- Multipass rendering
- Flat or Gouraud shading and texture mapping^[2]
- No line restriction
- Colored light sourcing
Resolutions:
- Progressive: 256×224 to 640×240 pixels^[2]
- Interlaced: 256×448 to 640×480 pixels
Colors:
- Maximum color depth of 16,777,216 colors (24-bit true color)
- 57,344 (256×224) to 153,600 (640×240) colors on screen
- Unlimited color lookup tables (CLUTs)
- 32 levels of transparency
- All calculations are performed to 24 bit accuracy
Texture mapping color mode:^[9]
- Mode 4: 4-bit CLUT (16 colors)
- Mode 8: 8-bit CLUT (256 colors)
- Mode 15: 15-bit direct (32,768 colors)
- Mode 24: 24-bit (16,777,216 colors)
Sprite engine^{[citation needed]}
- 1024×512 framebuffer, 8×8 and 16×16 sprite sizes, bitmap objects^{[citation needed]}
- Up to 4,000 sprites on screen (at 8×8 sprite size), scaling and rotation^[2]^[11]
- 256×256 maximum sprite size^[9]
Special sprite effects:^[9]
- Rotation
- Scaling up/down
- Warping
- Transparency
- Fading
- Priority
- Vertical and horizontal line scroll

Sound processing unit (SPU) edit

16-bit Sony SPU^[4]

Supports ADPCM sources with up to 24 channels^[4]
Sampling rate of up to 44.1 kHz^[4]
512 KB RAM^[4]
PCM audio source^[9]
Supports MIDI sequencing^[9]
Digital effects include:

I/O system and connectivity edit

CD-ROM drive

660 MB maximum storage capacity, double speed (CLV) CD-ROM drive
2×, with a maximum data throughput of 300 KB/s (double speed), 150 KB/s (normal)^[9]
32 KB data buffer^[12]
XA Mode 2 compliant
Audio CD play^[9]
CD-DA (CD-Digital Audio)
Rated for 70,000 seek operations^[13]

Two control pads via connectors^[9]

Expandable with multitap connector^[9]

Backup flash RAM support

Two removable cards^[9]
Each card has 128 KB flash memory
OS support for File Save, Retrieve and Remove^[9]
Some games (like "Music 2000") can use Memory Cards as main RAM, to store data for real time processing, bypassing the 2MB RAM limit.

Video and audio connectivity

AV Multi Out (Composite video, S-Video, RGBS)
RCA Composite video and Stereo out (SCPH-100x to 5000 only)
RFU (SCPH-112X) DC out (SCPH-100x to 5000 only)
S-Video out (SCPH-1000 only)

Serial and parallel ports

Serial I/O (used for PlayStation Link Cable SCPH-100x to 900x only)
Parallel I/O (N/A) SCPH-100x to 750x only)

Power input

100 V AC (NTSC-J); 120 V AC (NTSC-U/C); or 220–240 V AC (PAL)
7.5 V DC 2 A (PSone only)

References edit

^ "FastForward Sony Taps LSI Logic for PlayStation Video Game CPU Chip".
^ ^a ^b ^c ^d ^e "Sony's PlayStation Debuts in Japan!". Electronic Gaming Monthly. No. 65. Sendai Publishing. December 1994. p. 70.
^ "FastForward Sony Taps LSI Logic for PlayStation Video Game CPU Chip". FastForward. Retrieved 29 January 2014.
^ ^a ^b ^c ^d ^e ^f ^g ^h "Inside the PlayStation". Next Generation. No. 6. Imagine Media. June 1995. p. 51.
^ ^a ^b "Tech Specs: Sony PlayStation". Next Generation. No. 12. Imagine Media. December 1995. p. 40.
^ Net Yaroze User Guide. Sony Computer Entertainment Inc. February 1997. p. 14.
^ Karl Hodge. "Hall of Fame: Sony PlayStation, the games console that changed everything".
^ "Sony PlayStation". GamePro. No. 72. IDG. September 1994. p. 20.
^ ^a ^b ^c ^d ^e ^f ^g ^h ⁱ ^j ^k ^l "Sony PlayStation". Next Generation. No. 24. Imagine Media. December 1996. p. 50.
^ "Is it Time to Rename the GPU? | IEEE Computer Society".
^ "NEXT Generation Issue #1 January 1995". January 1995.
^ "Nocash PSXSPX Playstation Specifications - CDROM - Response/Data Queueing".
^ "Making Crash Bandicoot – part 5". 6 February 2011.

External links edit

The PlayStation's technical specifications on the official website

[1] "FastForward Sony Taps LSI Logic for PlayStation Video Game CPU Chip".

[EGM65-2] "Sony's PlayStation Debuts in Japan!". Electronic Gaming Monthly. No. 65. Sendai Publishing. December 1994. p. 70.

[patpend-3] "FastForward Sony Taps LSI Logic for PlayStation Video Game CPU Chip". FastForward. Retrieved 29 January 2014.

[NGen6-4] ^ ^a ^b ^c ^d ^e ^f ^g ^h "Inside the PlayStation". Next Generation. No. 6. Imagine Media. June 1995. p. 51.

[NGen12-5] "Tech Specs: Sony PlayStation". Next Generation. No. 12. Imagine Media. December 1995. p. 40.

[6] Net Yaroze User Guide. Sony Computer Entertainment Inc. February 1997. p. 14.

[7] Karl Hodge. "Hall of Fame: Sony PlayStation, the games console that changed everything".

[8] "Sony PlayStation". GamePro. No. 72. IDG. September 1994. p. 20.

[NGen24-9] ^ ^a ^b ^c ^d ^e ^f ^g ^h ⁱ ^j ^k ^l "Sony PlayStation". Next Generation. No. 24. Imagine Media. December 1996. p. 50.

[10] "Is it Time to Rename the GPU? | IEEE Computer Society".

[11] "NEXT Generation Issue #1 January 1995". January 1995.

[12] "Nocash PSXSPX Playstation Specifications - CDROM - Response/Data Queueing".

[13] "Making Crash Bandicoot – part 5". 6 February 2011.

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